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<title>llvm/test/CodeGen/ARM, branch release_27</title>
<subtitle>http://llvm.org</subtitle>
<id>https://git.amat.us/llvm/atom/test/CodeGen/ARM?h=release_27</id>
<link rel='self' href='https://git.amat.us/llvm/atom/test/CodeGen/ARM?h=release_27'/>
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<updated>2010-03-06T19:39:36Z</updated>
<entry>
<title>Initial bits of ARMv4-only support.</title>
<updated>2010-03-06T19:39:36Z</updated>
<author>
<name>Anton Korobeynikov</name>
<email>asl@math.spbu.ru</email>
</author>
<published>2010-03-06T19:39:36Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=ce7bf1c55f5238870bae2909cd368151f1d813d1'/>
<id>urn:sha1:ce7bf1c55f5238870bae2909cd368151f1d813d1</id>
<content type='text'>
Patch by John Tytgat!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97886 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>pr6478: The frame pointer spill frame index is only defined when there is a</title>
<updated>2010-03-04T21:42:36Z</updated>
<author>
<name>Bob Wilson</name>
<email>bob.wilson@apple.com</email>
</author>
<published>2010-03-04T21:42:36Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=436e6e7b5c85f12b7c2e41b7fd5c48e5d4d72912'/>
<id>urn:sha1:436e6e7b5c85f12b7c2e41b7fd5c48e5d4d72912</id>
<content type='text'>
frame pointer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97755 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>pr6480: Don't try producing ld/st-multiple instructions when the address is</title>
<updated>2010-03-04T21:04:38Z</updated>
<author>
<name>Bob Wilson</name>
<email>bob.wilson@apple.com</email>
</author>
<published>2010-03-04T21:04:38Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=bbf39b0fd9c83f1d46ca5f858e66de66fb64ec98'/>
<id>urn:sha1:bbf39b0fd9c83f1d46ca5f858e66de66fb64ec98</id>
<content type='text'>
an undef value.  This is only going to come up for bugpoint-reduced tests --
correct programs will not access memory at undefined addresses -- so it's not
worth the effort of doing anything more aggressive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97745 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Check for comparisons of +/- zero when optimizing less-than-or-equal and</title>
<updated>2010-02-24T22:15:53Z</updated>
<author>
<name>Bob Wilson</name>
<email>bob.wilson@apple.com</email>
</author>
<published>2010-02-24T22:15:53Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=e742bb53a3e68b88eac172782fd99cd98f89f4b3'/>
<id>urn:sha1:e742bb53a3e68b88eac172782fd99cd98f89f4b3</id>
<content type='text'>
greater-than-or-equal SELECT_CCs to NEON vmin/vmax instructions.  This is
only allowed when UnsafeFPMath is set or when at least one of the operands
is known to be nonzero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97065 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Use NEON vmin/vmax instructions for floating-point selects.</title>
<updated>2010-02-18T06:05:53Z</updated>
<author>
<name>Bob Wilson</name>
<email>bob.wilson@apple.com</email>
</author>
<published>2010-02-18T06:05:53Z</published>
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<id>urn:sha1:9f6c4c141ffa9c8b13e90dce2f2285c4479ff403</id>
<content type='text'>
Radar 7461718.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96572 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Fix pr6111: Avoid using the LR register for the target address of an indirect</title>
<updated>2010-02-16T17:24:15Z</updated>
<author>
<name>Bob Wilson</name>
<email>bob.wilson@apple.com</email>
</author>
<published>2010-02-16T17:24:15Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=1665b0a2246c83a2c123be105a1a167cf2b423fe'/>
<id>urn:sha1:1665b0a2246c83a2c123be105a1a167cf2b423fe</id>
<content type='text'>
branch in ARM v4 code, since it gets clobbered by the return address before
it is used.  Instead of adding a new register class containing all the GPRs
except LR, just use the existing tGPR class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96360 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Reapply the new LoopStrengthReduction code, with compile time and</title>
<updated>2010-02-12T10:34:29Z</updated>
<author>
<name>Dan Gohman</name>
<email>gohman@apple.com</email>
</author>
<published>2010-02-12T10:34:29Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=572645cf84060c0fc25cb91d38cb9079918b3a88'/>
<id>urn:sha1:572645cf84060c0fc25cb91d38cb9079918b3a88</id>
<content type='text'>
bug fixes, and with improved heuristics for analyzing foreign-loop
addrecs.

This change also flattens IVUsers, eliminating the stride-oriented
groupings, which makes it easier to work with.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95975 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Delete dead PHI machine instructions.  These can be created due to type</title>
<updated>2010-02-10T22:58:57Z</updated>
<author>
<name>Bob Wilson</name>
<email>bob.wilson@apple.com</email>
</author>
<published>2010-02-10T22:58:57Z</published>
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<id>urn:sha1:5e2b05a71e81b28712b77419f68657462494e103</id>
<content type='text'>
legalization even when the IR-level optimizer has removed dead phis, such
as when the high half of an i64 value is unused on a 32-bit target.
I had to adjust a few test cases that had dead phis.
This is a partial fix for Radar 7627077.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95816 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>convert to filecheck.</title>
<updated>2010-02-08T23:47:34Z</updated>
<author>
<name>Chris Lattner</name>
<email>sabre@nondot.org</email>
</author>
<published>2010-02-08T23:47:34Z</published>
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<id>urn:sha1:d863b766f57fb46d15ead90a48defa739b8393b5</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95608 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Run codegen dce pass for all targets at all optimization levels. Previously it's</title>
<updated>2010-02-06T09:07:11Z</updated>
<author>
<name>Evan Cheng</name>
<email>evan.cheng@apple.com</email>
</author>
<published>2010-02-06T09:07:11Z</published>
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<id>urn:sha1:00a99a35840451a291eb61a192a750908a4073ae</id>
<content type='text'>
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95493 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
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