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<title>llvm/test/CodeGen/AArch64, branch stable</title>
<subtitle>http://llvm.org</subtitle>
<id>https://git.amat.us/llvm/atom/test/CodeGen/AArch64?h=stable</id>
<link rel='self' href='https://git.amat.us/llvm/atom/test/CodeGen/AArch64?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/'/>
<updated>2013-03-26T18:56:54Z</updated>
<entry>
<title>Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings</title>
<updated>2013-03-26T18:56:54Z</updated>
<author>
<name>Hal Finkel</name>
<email>hfinkel@anl.gov</email>
</author>
<published>2013-03-26T18:56:54Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=8846129f6eb58982a2cac22306c8c9b586084475'/>
<id>urn:sha1:8846129f6eb58982a2cac22306c8c9b586084475</id>
<content type='text'>
The previous algorithm could not deal properly with scavenging multiple virtual
registers because it kept only one live virtual -&gt; physical mapping (and
iterated through operands in order). Now we don't maintain a current mapping,
but rather use replaceRegWith to completely remove the virtual register as
soon as the mapping is established.

In order to allow the register scavenger to return a physical register killed
by an instruction for definition by that same instruction, we now call
RS-&gt;forward(I) prior to eliminating virtual registers defined in I. This
requires a minor update to forward to ignore virtual registers.

These new features will be tested in forthcoming commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178058 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Test case hygiene.</title>
<updated>2013-03-09T18:25:40Z</updated>
<author>
<name>Benjamin Kramer</name>
<email>benny.kra@googlemail.com</email>
</author>
<published>2013-03-09T18:25:40Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=1cb47b9afe77231d6b87b8445dfec475fb5e59cd'/>
<id>urn:sha1:1cb47b9afe77231d6b87b8445dfec475fb5e59cd</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176772 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: specify full triple in test as only Linux works for now.</title>
<updated>2013-03-08T15:27:30Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-03-08T15:27:30Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=fa3dc9ffbb5d8b9bb742940388dd14fc5f282362'/>
<id>urn:sha1:fa3dc9ffbb5d8b9bb742940388dd14fc5f282362</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176692 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: expand sincos operations, we don't support them.</title>
<updated>2013-03-08T13:55:07Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-03-08T13:55:07Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=69fe178f7781fa3c01d013ac7b7858926064f6ca'/>
<id>urn:sha1:69fe178f7781fa3c01d013ac7b7858926064f6ca</id>
<content type='text'>
Patch based on Mans Rullgard's.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176688 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: be more careful resorting to inefficient addressing for weak vars.</title>
<updated>2013-02-28T14:36:31Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-02-28T14:36:31Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=6ff20f205b2aa126b268bcada9920f56715161be'/>
<id>urn:sha1:6ff20f205b2aa126b268bcada9920f56715161be</id>
<content type='text'>
If an otherwise weak var is actually defined in this unit, it can't be
undefined at runtime so we can use normal global variable sequences (ADRP/ADD)
to access it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176259 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: don't drop GlobalAddress offset when handling extern_weak decls.</title>
<updated>2013-02-28T14:36:24Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-02-28T14:36:24Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=5366ab21f4595d0e3888b2d23f38469da2465b8d'/>
<id>urn:sha1:5366ab21f4595d0e3888b2d23f38469da2465b8d</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176258 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: Use cbnz instead of cmp/b.ne pair for atomic operations.</title>
<updated>2013-02-28T13:52:07Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-02-28T13:52:07Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=279b9184c2ff4fea93b198a3519b8cb3a1d8d195'/>
<id>urn:sha1:279b9184c2ff4fea93b198a3519b8cb3a1d8d195</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176253 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: remove ConstantIsland pass &amp; put literals in separate section.</title>
<updated>2013-02-15T09:33:43Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-02-15T09:33:43Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=1e8839302b70d77de63844332bdee9ce7d06f2c9'/>
<id>urn:sha1:1e8839302b70d77de63844332bdee9ce7d06f2c9</id>
<content type='text'>
This implements the review suggestion to simplify the AArch64 backend. If we
later discover that we *really* need the extra complexity of the
ConstantIslands pass for performance reasons it can be resurrected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175258 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: refactor frame handling to use movz/movk for overlarge offsets.</title>
<updated>2013-02-15T09:33:26Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-02-15T09:33:26Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=148ac534fc5592ed7031efde9a577890f078068b'/>
<id>urn:sha1:148ac534fc5592ed7031efde9a577890f078068b</id>
<content type='text'>
In the near future litpools will be in a different section, which means that
any access to them is at least two instructions. This makes the case for a
movz/movk pair (if total offset &lt;= 32-bits) even more compelling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175257 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Implement external weak (ELF) symbols on AArch64</title>
<updated>2013-02-06T16:43:33Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-02-06T16:43:33Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=8a06229c89f848bf742e2b88423d02558b7ca638'/>
<id>urn:sha1:8a06229c89f848bf742e2b88423d02558b7ca638</id>
<content type='text'>
Weakly defined symbols should evaluate to 0 if they're undefined at
link-time. This is impossible to do with the usual address generation
patterns, so we should use a literal pool entry to materlialise the
address.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174518 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
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