<feed xmlns='http://www.w3.org/2005/Atom'>
<title>llvm/test/CodeGen/AArch64, branch release_33</title>
<subtitle>http://llvm.org</subtitle>
<id>https://git.amat.us/llvm/atom/test/CodeGen/AArch64?h=release_33</id>
<link rel='self' href='https://git.amat.us/llvm/atom/test/CodeGen/AArch64?h=release_33'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/'/>
<updated>2013-05-04T16:54:07Z</updated>
<entry>
<title>AArch64: support literal pool access in large memory model.</title>
<updated>2013-05-04T16:54:07Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-05-04T16:54:07Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=79c1c092dfd14703cdd47e96bc5a14d97322ee16'/>
<id>urn:sha1:79c1c092dfd14703cdd47e96bc5a14d97322ee16</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181120 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: support large code model for jump-tables</title>
<updated>2013-05-04T16:54:00Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-05-04T16:54:00Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=cd1b09b25b57c1fb09a50ded1d6852a5a1cb6377'/>
<id>urn:sha1:cd1b09b25b57c1fb09a50ded1d6852a5a1cb6377</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181119 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: implement support for blockaddress in large code model</title>
<updated>2013-05-04T16:53:53Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-05-04T16:53:53Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=b2efdde06c00023287255d9a09861e43fb5efebd'/>
<id>urn:sha1:b2efdde06c00023287255d9a09861e43fb5efebd</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181118 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: implement large code model access to global variables.</title>
<updated>2013-05-04T16:53:46Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-05-04T16:53:46Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=45db92038bf540fbbd8dfe5dff520aa8566d7cef'/>
<id>urn:sha1:45db92038bf540fbbd8dfe5dff520aa8566d7cef</id>
<content type='text'>
The MOVZ/MOVK instruction sequence may not be the most efficient (a
literal-pool load could be better) but adding that would require
reinstating the ConstantIslands pass.

For now the sequence is correct, and that's enough. Beware, as of
commit GNU ld does not appear to support the relocations needed for
this. Its primary purpose (for now) will be to support JITed code,
since in that case there is no guarantee of where your code will end
up in memory relative to external symbols it references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181117 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Replace coff-/elf-dump with llvm-readobj</title>
<updated>2013-04-12T04:06:46Z</updated>
<author>
<name>Nico Rieck</name>
<email>nico.rieck@gmail.com</email>
</author>
<published>2013-04-12T04:06:46Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=f89da7210b09a0a0f7c9ee216cd54dca03c6b64a'/>
<id>urn:sha1:f89da7210b09a0a0f7c9ee216cd54dca03c6b64a</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179361 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: remove barriers from AArch64 atomic operations.</title>
<updated>2013-04-08T08:40:41Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-04-08T08:40:41Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=211ffd242df8bacf4cbe034f5ca7545ab75b45df'/>
<id>urn:sha1:211ffd242df8bacf4cbe034f5ca7545ab75b45df</id>
<content type='text'>
I've managed to convince myself that AArch64's acquire/release
instructions are sufficient to guarantee C++11's required semantics,
even in the sequentially-consistent case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179005 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings</title>
<updated>2013-03-26T18:56:54Z</updated>
<author>
<name>Hal Finkel</name>
<email>hfinkel@anl.gov</email>
</author>
<published>2013-03-26T18:56:54Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=8846129f6eb58982a2cac22306c8c9b586084475'/>
<id>urn:sha1:8846129f6eb58982a2cac22306c8c9b586084475</id>
<content type='text'>
The previous algorithm could not deal properly with scavenging multiple virtual
registers because it kept only one live virtual -&gt; physical mapping (and
iterated through operands in order). Now we don't maintain a current mapping,
but rather use replaceRegWith to completely remove the virtual register as
soon as the mapping is established.

In order to allow the register scavenger to return a physical register killed
by an instruction for definition by that same instruction, we now call
RS-&gt;forward(I) prior to eliminating virtual registers defined in I. This
requires a minor update to forward to ignore virtual registers.

These new features will be tested in forthcoming commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178058 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Test case hygiene.</title>
<updated>2013-03-09T18:25:40Z</updated>
<author>
<name>Benjamin Kramer</name>
<email>benny.kra@googlemail.com</email>
</author>
<published>2013-03-09T18:25:40Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=1cb47b9afe77231d6b87b8445dfec475fb5e59cd'/>
<id>urn:sha1:1cb47b9afe77231d6b87b8445dfec475fb5e59cd</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176772 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: specify full triple in test as only Linux works for now.</title>
<updated>2013-03-08T15:27:30Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-03-08T15:27:30Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=fa3dc9ffbb5d8b9bb742940388dd14fc5f282362'/>
<id>urn:sha1:fa3dc9ffbb5d8b9bb742940388dd14fc5f282362</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176692 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AArch64: expand sincos operations, we don't support them.</title>
<updated>2013-03-08T13:55:07Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-03-08T13:55:07Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=69fe178f7781fa3c01d013ac7b7858926064f6ca'/>
<id>urn:sha1:69fe178f7781fa3c01d013ac7b7858926064f6ca</id>
<content type='text'>
Patch based on Mans Rullgard's.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176688 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
</feed>
