<feed xmlns='http://www.w3.org/2005/Atom'>
<title>llvm/projects/sample/configure, branch testing</title>
<subtitle>http://llvm.org</subtitle>
<id>https://git.amat.us/llvm/atom/projects/sample/configure?h=testing</id>
<link rel='self' href='https://git.amat.us/llvm/atom/projects/sample/configure?h=testing'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/'/>
<updated>2013-01-31T12:12:40Z</updated>
<entry>
<title>Add AArch64 as an experimental target.</title>
<updated>2013-01-31T12:12:40Z</updated>
<author>
<name>Tim Northover</name>
<email>Tim.Northover@arm.com</email>
</author>
<published>2013-01-31T12:12:40Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=72062f5744557e270a38192554c3126ea5f97434'/>
<id>urn:sha1:72062f5744557e270a38192554c3126ea5f97434</id>
<content type='text'>
This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.

This initial commit should have support for:
    + Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
      (except the late addition CRC instructions).
    + CodeGen features required for C++03 and C99.
    + Compilation for the "small" memory model: code+static data &lt;
      4GB.
    + Absolute and position-independent code.
    + GNU-style (i.e. "__thread") TLS.
    + Debugging information.

The principal omission, currently, is performance tuning.

This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.

Further reviews would be gratefully received.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Few more small CellSPU removals.</title>
<updated>2012-11-14T22:13:56Z</updated>
<author>
<name>Eric Christopher</name>
<email>echristo@gmail.com</email>
</author>
<published>2012-11-14T22:13:56Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=1a35292b486b05164d36c1a1fb1593c726fe5b07'/>
<id>urn:sha1:1a35292b486b05164d36c1a1fb1593c726fe5b07</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167987 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Add --enable-werror and --enable-cxx11 to projects/sample/</title>
<updated>2012-11-12T06:11:12Z</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@gmail.com</email>
</author>
<published>2012-11-12T06:11:12Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=8ee3963409097ba9f7717c325ae6ebd821bc965b'/>
<id>urn:sha1:8ee3963409097ba9f7717c325ae6ebd821bc965b</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167716 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Add mips64-* and mips64el-* triples to configure scripts</title>
<updated>2012-10-29T19:49:45Z</updated>
<author>
<name>Simon Atanasyan</name>
<email>satanasyan@mips.com</email>
</author>
<published>2012-10-29T19:49:45Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=4830ccff925b8d57f589650a3ad6007ffa0536d5'/>
<id>urn:sha1:4830ccff925b8d57f589650a3ad6007ffa0536d5</id>
<content type='text'>
as valid triples denote  Mips target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166961 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Revert "Build script changes for R600/SI Codegen v6"</title>
<updated>2012-07-16T18:19:46Z</updated>
<author>
<name>Tom Stellard</name>
<email>thomas.stellard@amd.com</email>
</author>
<published>2012-07-16T18:19:46Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=38cda13c058a32ff4e84dd44ebd5b5f0e25b948e'/>
<id>urn:sha1:38cda13c058a32ff4e84dd44ebd5b5f0e25b948e</id>
<content type='text'>
This reverts commit e3013202259ed1e006c21817c63cf25d75982721.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160301 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Build script changes for R600/SI Codegen v6</title>
<updated>2012-07-16T14:17:16Z</updated>
<author>
<name>Tom Stellard</name>
<email>thomas.stellard@amd.com</email>
</author>
<published>2012-07-16T14:17:16Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=a93c8a89c148a92a4234e0dcc76231b13bebc4e7'/>
<id>urn:sha1:a93c8a89c148a92a4234e0dcc76231b13bebc4e7</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160272 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Add mipsel-* to the list of targets recognized by configure script.</title>
<updated>2012-06-18T19:06:25Z</updated>
<author>
<name>Simon Atanasyan</name>
<email>satanasyan@mips.com</email>
</author>
<published>2012-06-18T19:06:25Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=0fad48fd868ec093890e75e4d4128ae4d571c7b7'/>
<id>urn:sha1:0fad48fd868ec093890e75e4d4128ae4d571c7b7</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158670 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Remove the PTX back-end and all of its artifacts (triple, etc.)</title>
<updated>2012-05-24T21:38:21Z</updated>
<author>
<name>Justin Holewinski</name>
<email>jholewinski@nvidia.com</email>
</author>
<published>2012-05-24T21:38:21Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=42a0b48dd3773574f648c19b4d9abafb6b4a4f16'/>
<id>urn:sha1:42a0b48dd3773574f648c19b4d9abafb6b4a4f16</id>
<content type='text'>
This back-end was deprecated in favor of the NVPTX back-end.

NV_CONTRIB

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157417 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Update all outdated autoconf files in the sample project.</title>
<updated>2012-05-05T15:02:39Z</updated>
<author>
<name>Benjamin Kramer</name>
<email>benny.kra@googlemail.com</email>
</author>
<published>2012-05-05T15:02:39Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=0017180e70edb1461e06a4aeafd95d760a539e69'/>
<id>urn:sha1:0017180e70edb1461e06a4aeafd95d760a539e69</id>
<content type='text'>
We might just use symlinks here, but I'm afraid of possible portability issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156235 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>This patch adds a new NVPTX back-end to LLVM which supports code generation for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it.</title>
<updated>2012-05-04T20:18:50Z</updated>
<author>
<name>Justin Holewinski</name>
<email>jholewinski@nvidia.com</email>
</author>
<published>2012-05-04T20:18:50Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=49683f3c961379fbc088871a5d6304950f1f1cbc'/>
<id>urn:sha1:49683f3c961379fbc088871a5d6304950f1f1cbc</id>
<content type='text'>
The new target machines are:

nvptx (old ptx32) =&gt; 32-bit PTX
nvptx64 (old ptx64) =&gt; 64-bit PTX

The sources are based on the internal NVIDIA NVPTX back-end, and
contain more functionality than the current PTX back-end currently
provides.

NV_CONTRIB

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156196 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
</feed>
