llvm/lib/Transforms/InstCombine, branch release_29

--- Merging r127464 into '.':

2011-03-14T20:06:27Z

U test/Transforms/InstCombine/select.ll U lib/Transforms/InstCombine/InstCombineSelect.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_29@127609 91177308-0d34-0410-b5e6-96231b3b80d8

Add more analysis of the sign bit of an srem instruction. If the LHS is negative

2011-03-07T01:50:10Z

then the result could go either way. If it's provably positive then so is the srem. Fixes PR9343 #7! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127146 91177308-0d34-0410-b5e6-96231b3b80d8

ConstantInt has some getters which return ConstantInt's or ConstantVector's of

2011-03-06T03:36:19Z

the value splatted into every element. Extend this to getTrue and getFalse which by providing new overloads that take Types that are either i1 or . Use it in InstCombine to add vector support to some code, fixing PR8469! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127116 91177308-0d34-0410-b5e6-96231b3b80d8

InstCombine: We know the number of items initially added to the worklist map, reserve space early to avoid rehashing.

2011-03-05T16:43:46Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127089 91177308-0d34-0410-b5e6-96231b3b80d8

Thread comparisons over udiv/sdiv/ashr/lshr exact and lshr nuw/nsw whenever

2011-03-05T05:19:11Z

possible. This goes into instcombine and instsimplify because instsimplify doesn't need to check hasOneUse since it returns (almost exclusively) constants. This fixes PR9343 #4 #5 and #8! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127064 91177308-0d34-0410-b5e6-96231b3b80d8

Try once again to optimize "icmp (srem X, Y), Y" by turning the comparison into

2011-03-05T04:28:48Z

true/false or "icmp slt/sge Y, 0". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127063 91177308-0d34-0410-b5e6-96231b3b80d8

Make InstCombiner::FoldAndOfICmps create a ConstantRange that's the

2011-03-01T15:05:01Z

intersection of the LHS and RHS ConstantRanges and return "false" when the range is empty. This simplifies some code and catches some extra cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126744 91177308-0d34-0410-b5e6-96231b3b80d8

srem doesn't actually have the same resulting sign as its numerator, you could

2011-02-28T09:17:39Z

also have a zero when numerator = denominator. Reverts parts of r126635 and r126637. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126644 91177308-0d34-0410-b5e6-96231b3b80d8

Teach InstCombine to fold "(shr exact X, Y) == 0" --> X == 0, fixing #1 from

2011-02-28T08:31:40Z

PR9343. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126643 91177308-0d34-0410-b5e6-96231b3b80d8

The sign of an srem instruction is the sign of its dividend (the first

2011-02-28T06:20:05Z

argument), regardless of the divisor. Teach instcombine about this and fix test7 in PR9343! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126635 91177308-0d34-0410-b5e6-96231b3b80d8