llvm/lib/Target, branch stable http://llvm.org https://git.amat.us/llvm/atom/lib/Target?h=stable 2013-04-01T22:05:58Z Target/R600: Fix CMake build to add missing files. 2013-04-01T22:05:58Z NAKAMURA Takumi geek4civic@gmail.com 2013-04-01T22:05:58Z urn:sha1:8d9594fe92f207095588ad6eb2472ba5df097a38 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178508 91177308-0d34-0410-b5e6-96231b3b80d8 R600: Add support for native control flow 2013-04-01T21:48:05Z Vincent Lejeune vljn@ovi.com 2013-04-01T21:48:05Z urn:sha1:08001a5a1565adb8ce18b97537dd75075992d09a git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178505 91177308-0d34-0410-b5e6-96231b3b80d8 R600/SI: Share code recording ShaderTypeAttribute between generations 2013-04-01T21:47:53Z Vincent Lejeune vljn@ovi.com 2013-04-01T21:47:53Z urn:sha1:88524e3f6c314e231678a51479c305e9f3df3fa9 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178504 91177308-0d34-0410-b5e6-96231b3b80d8 R600: Emit CF_ALU and use true kcache register. 2013-04-01T21:47:42Z Vincent Lejeune vljn@ovi.com 2013-04-01T21:47:42Z urn:sha1:8e59191eb8033133f5b2923d2056d4362af913ce git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178503 91177308-0d34-0410-b5e6-96231b3b80d8 Fix a bad assert in PPCTargetLowering 2013-04-01T18:42:58Z Hal Finkel hfinkel@anl.gov 2013-04-01T18:42:58Z urn:sha1:a1646ceb9a5da080607e503c8bd36241aa465613 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178489 91177308-0d34-0410-b5e6-96231b3b80d8 Add more PPC floating-point conversion instructions 2013-04-01T17:52:07Z Hal Finkel hfinkel@anl.gov 2013-04-01T17:52:07Z urn:sha1:46479197843ecb651adc9417c49bbd1b00acfcb6 The P7 and A2 have additional floating-point conversion instructions which allow a direct two-instruction sequence (plus load/store) to convert from all combinations (signed/unsigned i32/i64) <--> (float/double) (on previous cores, only some combinations were directly available). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178480 91177308-0d34-0410-b5e6-96231b3b80d8 Use ImmToIdxMap.count in PPCRegisterInfo 2013-04-01T17:02:06Z Hal Finkel hfinkel@anl.gov 2013-04-01T17:02:06Z urn:sha1:a1f4290ac94f34173e3561c717390de07dccc646 Code improvement suggested by Jakob (in review of r178450). No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178473 91177308-0d34-0410-b5e6-96231b3b80d8 Add the PPC popcntw instruction 2013-04-01T15:58:15Z Hal Finkel hfinkel@anl.gov 2013-04-01T15:58:15Z urn:sha1:1fce88313e4d46fdd432b68f7c54fde972c0b526 The popcntw instruction is available whenever the popcntd instruction is available, and performs a separate popcnt on the lower and upper 32-bits. Ignoring the high-order count, this can be used for the 32-bit input case (saving on the explicit zero extension otherwise required to use popcntd). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178470 91177308-0d34-0410-b5e6-96231b3b80d8 Treat PPCISD::STFIWX like the memory opcode that it is 2013-04-01T15:37:53Z Hal Finkel hfinkel@anl.gov 2013-04-01T15:37:53Z urn:sha1:f170cc9b2eb98efee40ee22cff6bcf401c209b00 PPCISD::STFIWX is really a memory opcode, and so it should come after FIRST_TARGET_MEMORY_OPCODE, and we should use DAG.getMemIntrinsicNode to create nodes using it. No functionality change intended (although there could be optimization benefits from preserving the MMO information). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178468 91177308-0d34-0410-b5e6-96231b3b80d8 Remove unused typedef. 2013-04-01T13:46:15Z Duncan Sands baldrick@free.fr 2013-04-01T13:46:15Z urn:sha1:0857a6fd3397c442dc4dc150a222b0be911f9b5e git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178462 91177308-0d34-0410-b5e6-96231b3b80d8