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<title>llvm/lib/Target, branch release_33</title>
<subtitle>http://llvm.org</subtitle>
<id>https://git.amat.us/llvm/atom/lib/Target?h=release_33</id>
<link rel='self' href='https://git.amat.us/llvm/atom/lib/Target?h=release_33'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/'/>
<updated>2013-05-09T07:33:50Z</updated>
<entry>
<title>Merging r181423:</title>
<updated>2013-05-09T07:33:50Z</updated>
<author>
<name>Bill Wendling</name>
<email>isanbard@gmail.com</email>
</author>
<published>2013-05-09T07:33:50Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=5f32469bd4d236a84313580c97085abb385ed605'/>
<id>urn:sha1:5f32469bd4d236a84313580c97085abb385ed605</id>
<content type='text'>
------------------------------------------------------------------------
r181423 | hfinkel | 2013-05-08 05:16:14 -0700 (Wed, 08 May 2013) | 5 lines

PPCInstrInfo::optimizeCompareInstr should not optimize FP compares

The floating-point record forms on PPC don't set the condition register bits
based on a comparison with zero (like the integer record forms do), but rather
based on the exception status bits.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181507 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Merge of r181312</title>
<updated>2013-05-08T09:40:09Z</updated>
<author>
<name>Richard Sandiford</name>
<email>rsandifo@linux.vnet.ibm.com</email>
</author>
<published>2013-05-08T09:40:09Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=93618a91c6f2476c77f1ce7221d74b406393a2d1'/>
<id>urn:sha1:93618a91c6f2476c77f1ce7221d74b406393a2d1</id>
<content type='text'>
[SystemZ] Fix InitMCCodeGenInfo call

createSystemZMCCodeGenInfo was not passing the optimization level to
InitMCCodeGenInfo(), so -O0 would be ignored.  Fixes DebugInfo/namespace.ll
after the changes in r181271.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181419 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Merging r181313:</title>
<updated>2013-05-08T09:15:09Z</updated>
<author>
<name>Bill Wendling</name>
<email>isanbard@gmail.com</email>
</author>
<published>2013-05-08T09:15:09Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=da04487b8204a230ed55c699772ddc7409f8bcd4'/>
<id>urn:sha1:da04487b8204a230ed55c699772ddc7409f8bcd4</id>
<content type='text'>
------------------------------------------------------------------------
r181313 | mkuper | 2013-05-07 07:05:33 -0700 (Tue, 07 May 2013) | 1 line

Re-enable AVX detection on x64 platforms.
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181399 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>R600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcode</title>
<updated>2013-05-06T23:02:19Z</updated>
<author>
<name>Tom Stellard</name>
<email>thomas.stellard@amd.com</email>
</author>
<published>2013-05-06T23:02:19Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=3d834a44f6e7c195f2da3b483a7c5766552297bd'/>
<id>urn:sha1:3d834a44f6e7c195f2da3b483a7c5766552297bd</id>
<content type='text'>
Patch by: Michel Dänzer

Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Reviewed-by: Tom Stellard &lt;thomas.stellard@amd.com&gt;

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181269 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>R600/SI: Handle arbitrary destination type in SITargetLowering::adjustWritemask</title>
<updated>2013-05-06T23:02:15Z</updated>
<author>
<name>Tom Stellard</name>
<email>thomas.stellard@amd.com</email>
</author>
<published>2013-05-06T23:02:15Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=ea73bd8a542f4a943a5a0d23c60777acf9471d87'/>
<id>urn:sha1:ea73bd8a542f4a943a5a0d23c60777acf9471d87</id>
<content type='text'>
Patch by: Michel Dänzer

Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Reviewed-by: Tom Stellard &lt;thomas.stellard@amd.com&gt;

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181268 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>R600/SI: Add intrinsic for texture image loading</title>
<updated>2013-05-06T23:02:12Z</updated>
<author>
<name>Tom Stellard</name>
<email>thomas.stellard@amd.com</email>
</author>
<published>2013-05-06T23:02:12Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=651a4c8ee08ccbf59e1a677abc3a2424e50b4c2c'/>
<id>urn:sha1:651a4c8ee08ccbf59e1a677abc3a2424e50b4c2c</id>
<content type='text'>
Patch by: Michel Dänzer

Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Reviewed-by: Tom Stellard &lt;thomas.stellard@amd.com&gt;

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181267 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>R600/SI: Add pattern for uint_to_fp</title>
<updated>2013-05-06T23:02:07Z</updated>
<author>
<name>Tom Stellard</name>
<email>thomas.stellard@amd.com</email>
</author>
<published>2013-05-06T23:02:07Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=e756ffd8883c8950a16a781e97e85de5dcbb22a7'/>
<id>urn:sha1:e756ffd8883c8950a16a781e97e85de5dcbb22a7</id>
<content type='text'>
Patch by: Michel Dänzer

Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Reviewed-by: Tom Stellard &lt;thomas.stellard@amd.com&gt;

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181266 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>R600/SI: Add patterns for integer maxima / minima</title>
<updated>2013-05-06T23:02:04Z</updated>
<author>
<name>Tom Stellard</name>
<email>thomas.stellard@amd.com</email>
</author>
<published>2013-05-06T23:02:04Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=586862ae231ca4570149ee1b36a1929a730afae8'/>
<id>urn:sha1:586862ae231ca4570149ee1b36a1929a730afae8</id>
<content type='text'>
Patch by: Michel Dänzer

Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Reviewed-by: Tom Stellard &lt;thomas.stellard@amd.com&gt;

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181265 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>R600/SI: Add pattern for AMDGPU.trunc intrinsic</title>
<updated>2013-05-06T23:02:00Z</updated>
<author>
<name>Tom Stellard</name>
<email>thomas.stellard@amd.com</email>
</author>
<published>2013-05-06T23:02:00Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=354769ba3206e9c58f8842d3852ca85a86794b8f'/>
<id>urn:sha1:354769ba3206e9c58f8842d3852ca85a86794b8f</id>
<content type='text'>
Patch by: Michel Dänzer

Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Reviewed-by: Tom Stellard &lt;thomas.stellard@amd.com&gt;

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181263 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Print IR from Hexagon MI passes with -print-before/after-all.</title>
<updated>2013-05-06T21:58:00Z</updated>
<author>
<name>Krzysztof Parzyszek</name>
<email>kparzysz@codeaurora.org</email>
</author>
<published>2013-05-06T21:58:00Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=942940a3262242ac55efea88f818959f28d18bba'/>
<id>urn:sha1:942940a3262242ac55efea88f818959f28d18bba</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181255 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
</feed>
