llvm/lib/Target, branch release_25http://llvm.orghttps://git.amat.us/llvm/atom/lib/Target?h=release_252009-02-14T01:14:49ZMerge r64316 from mainline.2009-02-14T01:14:49ZTanya Lattnertonic@nondot.org2009-02-14T01:14:49Zurn:sha1:606531328717459521c87b6ac091720c1e763365
Don't try to set an EFLAGS operand to dead if no instruction was created.
This fixes a bug introduced by r61215.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_25@64524 91177308-0d34-0410-b5e6-96231b3b80d8
Merge 64124 frm mainline.2009-02-14T00:59:47ZTanya Lattnertonic@nondot.org2009-02-14T00:59:47Zurn:sha1:6a64c0bc1e7ac9459f769d1cca79bb13ab2fb452
Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_25@64518 91177308-0d34-0410-b5e6-96231b3b80d8
Merge from mainline.2009-02-04T23:16:46ZTanya Lattnertonic@nondot.org2009-02-04T23:16:46Zurn:sha1:2097f1b25c42f6c3426d846c19340d69613dac3f
Tevert part of the x86 subtarget logic changes: when -march=x86-64
is given, override the subtarget settings and enable 64-bit support.
This restores the earlier behavior, and fixes regressions on
Non-64-bit-capable x86-32 hosts.
This isn't necessarily the best approach, but the most obvious
alternative is to require -mcpu=x86-64 or -mattr=+64bit to be used
with -march=x86-64 when the host doesn't have 64-bit support. This
makes things little more consistent, but it's less convenient, and
it has the practical drawback of requiring lots of test changes, so
I opted for the above approach for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_25@63792 91177308-0d34-0410-b5e6-96231b3b80d8
Create DebugLoc information in FastISel. Several temporary methods were2009-02-03T00:55:04ZBill Wendlingisanbard@gmail.com2009-02-03T00:55:04Zurn:sha1:9bc96a57206cbebaa9b0ba9979f949eb10c1592c
created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.
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Change Feature64Bit to not imply FeatureSSE2. All x86-64 hardware has2009-02-03T00:04:43ZDan Gohmangohman@apple.com2009-02-03T00:04:43Zurn:sha1:f75e5b4d8cbbec83924a3186a167a03564e5c373
SSE2, however it's possible to disable SSE2, and the subtarget support
code thinks that if 64-bit implies SSE2 and SSE2 is disabled then
64-bit should also be disabled. Instead, just mark all the 64-bit
subtargets as explicitly supporting SSE2.
Also, move the code that makes -march=x86-64 enable 64-bit support by
default to only apply when there is no explicit subtarget. If you
need to specify a subtarget and you want 64-bit code, you'll need to
select a subtarget that supports 64-bit code.
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Only force SSE level if it is not correct.2009-02-02T21:57:34ZTorok Edwinedwintorok@gmail.com2009-02-02T21:57:34Zurn:sha1:b68a88bd48c0fcee7bba2d01a3e3602e98aa27e7
Add an assert to check HasX86_64 status.
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remove #if 0 code on Bill's request.2009-02-02T20:23:02ZTorok Edwinedwintorok@gmail.com2009-02-02T20:23:02Zurn:sha1:38870ed13c17ec8169b2c64f77dcf54186dcd8a1
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Made the common case of default address space directive as non-virtual for performance reasons. Provide a single virtual interface for directives of all sizes in non-default address spaces.2009-02-02T16:53:06ZSanjiv Guptasanjiv.gupta@microchip.com2009-02-02T16:53:06Zurn:sha1:3b020feb571960f76f4d402e4efcffb8daf48e5a
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ADD / SUB / SMUL / UMUL with overflow second result top bits must be zero.2009-02-02T09:15:04ZEvan Chengevan.cheng@apple.com2009-02-02T09:15:04Zurn:sha1:97d0e0e31409865b2077248a05b1b91b4a259d95
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63509 91177308-0d34-0410-b5e6-96231b3b80d8
Add comment.2009-02-02T08:19:07ZEvan Chengevan.cheng@apple.com2009-02-02T08:19:07Zurn:sha1:961d6d4ac07fedc37b6dadc00e5be54aa720c224
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63506 91177308-0d34-0410-b5e6-96231b3b80d8