llvm/lib/Target, branch release_24http://llvm.orghttps://git.amat.us/llvm/atom/lib/Target?h=release_242008-10-30T06:06:32ZMerge from mainline.2008-10-30T06:06:32ZTanya Lattnertonic@nondot.org2008-10-30T06:06:32Zurn:sha1:d3598cc85988bc7d68c3788e715f2faa8da4d177
Move the code that adds the DeadMachineInstructionElimPass from
target-independent code to target-specific code. This prevents it
from running on targets that aren't using fast-isel.
In addition to saving compile time, this addresses the problem
that not all targets are prepared for it. In order to use this
pass, all instructions must declare all their fixed uses and
defs of physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_24@58425 91177308-0d34-0410-b5e6-96231b3b80d8
Merge from mainline.2008-10-30T05:55:00ZTanya Lattnertonic@nondot.org2008-10-30T05:55:00Zurn:sha1:83d348295e42d14dec2a6b7d53359b57b4db7bd1
Fix a nasty miscompilation of 176.gcc on linux/x86 where we synthesized
a memset using 16-byte XMM stores, but where the stack realignment code
didn't work. Until it does (PR2962) disable use of xmm regs in memcpy
and memset formation for linux and other targets with insufficiently
aligned stacks.
This is part of PR2888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_24@58423 91177308-0d34-0410-b5e6-96231b3b80d8
Fix build error.2008-10-22T21:46:49ZTanya Lattnertonic@nondot.org2008-10-22T21:46:49Zurn:sha1:43b4e355472b2c25e4ebf0946594945dc1f1b43a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_24@58004 91177308-0d34-0410-b5e6-96231b3b80d8
Rename bitcastToAPInt to convertToAPInt.2008-10-22T21:43:33ZTanya Lattnertonic@nondot.org2008-10-22T21:43:33Zurn:sha1:60840c8b35d2b5da8d7151276333ce1000bb08a5
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_24@58003 91177308-0d34-0410-b5e6-96231b3b80d8
Merge from mainline.2008-10-22T05:05:36ZTanya Lattnertonic@nondot.org2008-10-22T05:05:36Zurn:sha1:b9c01c2c6f1f1371440af1e5b0b01245ae060d0a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_24@57957 91177308-0d34-0410-b5e6-96231b3b80d8
Merge from mainline.2008-10-17T21:07:48ZTanya Lattnertonic@nondot.org2008-10-17T21:07:48Zurn:sha1:738c257ed4ca32826b829c376c0108e3afba2166
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_24@57725 91177308-0d34-0410-b5e6-96231b3b80d8
Merge from mainline.2008-10-17T17:53:06ZTanya Lattnertonic@nondot.org2008-10-17T17:53:06Zurn:sha1:6025e4b7e6b207cffe2d0766fb159ba581798239
Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
parameters instead of raw Constants. This prevents the constants from
being selected by the isel pass, fixing PR2735.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_24@57700 91177308-0d34-0410-b5e6-96231b3b80d8
Note that ADDC and company don't actually expand yet (missing in legalize2008-10-07T02:10:26ZAndrew Lenharthandrewl@lenharth.org2008-10-07T02:10:26Zurn:sha1:1b19ef029574592ae25c42fdbc58987e3e2e6476
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57226 91177308-0d34-0410-b5e6-96231b3b80d8
Fix PR2850 and PR2863. Only generate movddup for 128-bit SSE vector shuffles.2008-10-06T21:13:08ZEvan Chengevan.cheng@apple.com2008-10-06T21:13:08Zurn:sha1:882cdfde516fb97a1fda1a3bbc85b1792aa7659c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57210 91177308-0d34-0410-b5e6-96231b3b80d8
It is possible that all functions in one module are not being 2008-10-06T18:03:39ZDevang Pateldpatel@apple.com2008-10-06T18:03:39Zurn:sha1:e76225a4c1f185e7a00f790f956bd3ff0e017c90
optimized for size. Set OptForSize for each function separately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57182 91177308-0d34-0410-b5e6-96231b3b80d8