llvm/lib/Target/XCore, branch masterhttp://llvm.orghttps://git.amat.us/llvm/atom/lib/Target/XCore?h=master2013-05-13T01:16:13ZRemove the MachineMove class.2013-05-13T01:16:13ZRafael Espindolarafael.espindola@gmail.com2013-05-13T01:16:13Zurn:sha1:4a971705bc6030dc2e4338b3cd5cffa2e0f88b7b
It was just a less powerful and more confusing version of
MCCFIInstruction. A side effect is that, since MCCFIInstruction uses
dwarf register numbers, calls to getDwarfRegNum are pushed out, which
should allow further simplifications.
I left the MachineModuleInfo::addFrameMove interface unchanged since
this patch was already fairly big.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181680 91177308-0d34-0410-b5e6-96231b3b80d8
Change getFrameMoves to return a const reference.2013-05-11T02:38:11ZRafael Espindolarafael.espindola@gmail.com2013-05-11T02:38:11Zurn:sha1:d84ccfaf50c7843f31ffc74a8a8e33f779453d6e
To add a frame now there is a dedicated addFrameMove which also takes
care of constructing the move itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181657 91177308-0d34-0410-b5e6-96231b3b80d8
Remove unused argument.2013-05-10T18:16:59ZRafael Espindolarafael.espindola@gmail.com2013-05-10T18:16:59Zurn:sha1:6e53180db120b30f600ac31611a9dd47ef7f4921
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181618 91177308-0d34-0410-b5e6-96231b3b80d8
[XCore] Fix handling of functions where only the LR is spilled.2013-05-09T16:43:42ZRichard Osbornerichard@xmos.com2013-05-09T16:43:42Zurn:sha1:9bd913c4c1f350562b5a31e79a82dcaf143b06e0
Previously we only checked if the LR required saving if the frame size was
non zero. However because the caller reserves 1 word for the callee to use
that doesn't count towards our frame size it is possible for the LR to need
saving and for the frame size to be 0.
We didn't hit when the LR needed saving because of a function calls because
the 1 word of stack we must allocate for our callee means the frame size
is always non zero in this case. However we can hit this case if the LR is
clobbered in inline asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181520 91177308-0d34-0410-b5e6-96231b3b80d8
[XCore] Add LDAPB instructions.2013-05-05T13:36:53ZRichard Osbornerichard@xmos.com2013-05-05T13:36:53Zurn:sha1:589ddc9887406ddfd5a2661b567057faad7a22cc
With the change the disassembler now supports the XCore ISA in its
entirety.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181155 91177308-0d34-0410-b5e6-96231b3b80d8
[XCore] Update LDAP to use pcrel_imm.2013-05-05T13:33:10ZRichard Osbornerichard@xmos.com2013-05-05T13:33:10Zurn:sha1:fae63389d9a7fb2d0c544732ae5634563bd274aa
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181154 91177308-0d34-0410-b5e6-96231b3b80d8
[XCore] Rename calltarget -> pcrel_imm.2013-05-05T13:29:02ZRichard Osbornerichard@xmos.com2013-05-05T13:29:02Zurn:sha1:24aeab3d8a4830b333f6453c16c14f7f87e3cee4
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181153 91177308-0d34-0410-b5e6-96231b3b80d8
[XCore] Add BLRB instructions.2013-05-05T13:24:16ZRichard Osbornerichard@xmos.com2013-05-05T13:24:16Zurn:sha1:c601bd69d5c7fcd3bf9946e8a8a1bd1f9ab6642b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181152 91177308-0d34-0410-b5e6-96231b3b80d8
[XCore] Remove '-' from back branch asm syntax.2013-05-05T13:20:22ZRichard Osbornerichard@xmos.com2013-05-05T13:20:22Zurn:sha1:1114b0ec15aaa22dfc0ce582820cea556600d103
Instead operands are treated as negative immediates
where the sign bit is implicit in the instruction
encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181151 91177308-0d34-0410-b5e6-96231b3b80d8
Fix buildbot failure on 64 bit linux due to std::max() having different2013-05-04T17:41:01ZRichard Osbornerichard@xmos.com2013-05-04T17:41:01Zurn:sha1:7153a30610e78c5cd1347a31f3a90dde2f335f37
operand types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181128 91177308-0d34-0410-b5e6-96231b3b80d8