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<title>llvm/lib/Target/Mips, branch release_32</title>
<subtitle>http://llvm.org</subtitle>
<id>https://git.amat.us/llvm/atom/lib/Target/Mips?h=release_32</id>
<link rel='self' href='https://git.amat.us/llvm/atom/lib/Target/Mips?h=release_32'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/'/>
<updated>2012-12-04T20:23:05Z</updated>
<entry>
<title>Merging MIPS JIT/MCJIT changeset into 3.2 release branch.</title>
<updated>2012-12-04T20:23:05Z</updated>
<author>
<name>Pawel Wodnicki</name>
<email>pawel@32bitmicro.com</email>
</author>
<published>2012-12-04T20:23:05Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=7d2093c741f929a65f2ae0de261872cb7dc8cdba'/>
<id>urn:sha1:7d2093c741f929a65f2ae0de261872cb7dc8cdba</id>
<content type='text'>
Merging r169183:

RuntimeDyld: Fix up r169178. MSVC doesn't like "or".

Merging r169178:

Runtime dynamic linker for MCJIT should support MIPS BigEndian architecture.
This small change adds support for that. It will make all MCJIT tests pass
in make-check on BigEndian platforms.

Patch by Petar Jovanovic.

Merging r169177:

Classic JIT is still being supported by MIPS, along with MCJIT.
This change adds endian-awareness to MipsJITInfo and emitWordLE in
MipsCodeEmitter has become emitWord now to support both endianness.

Patch by Petar Jovanovic.

Merging r169174:

Functions in MipsCodeEmitter.cpp that expand unaligned loads/stores are dead
code. Removing it.

Patch by Petar Jovanovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_32@169296 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Merging MIPS GOT changeset into 3.2 release branch.</title>
<updated>2012-12-04T19:47:56Z</updated>
<author>
<name>Pawel Wodnicki</name>
<email>pawel@32bitmicro.com</email>
</author>
<published>2012-12-04T19:47:56Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=bdcb22211f5642528f75c1f2b079922f2cc45ee6'/>
<id>urn:sha1:bdcb22211f5642528f75c1f2b079922f2cc45ee6</id>
<content type='text'>
Merging r168471:

Mips direct object xgot support

This patch provides support for the MIPS relocations:

    *)  R_MIPS_GOT_HI16
    *)  R_MIPS_GOT_LO16
    *)  R_MIPS_CALL_HI16
    *)  R_MIPS_CALL_LO16

These are used for large GOT instruction sequences.

Contributer: Jack Carter

Merging r168460:

[mips] Generate big GOT code.

Merging r168458:

[mips] Simplify lowering functions in MipsISelLowering.cpp by using the helper
functions added in r168456.

Merging r168456:

[mips] Add helper functions that create nodes for computing address.

Merging r168455:

[mips] Add command line option "-mxgot".

Merging r168453:

[mips] When a node which loads from a GOT is created, pass a MachinePointerInfo
referring to a GOT entry.

Merging r168450:

[mips] Add target operand flag enums for big GOT relocations.

Merging r168448:

Add relocations used for mips big GOT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_32@169294 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>[mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.</title>
<updated>2012-11-07T19:10:58Z</updated>
<author>
<name>Akira Hatanaka</name>
<email>ahatanaka@mips.com</email>
</author>
<published>2012-11-07T19:10:58Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=e90a3bcae1cd936aa760cffe5607266279b210d1'/>
<id>urn:sha1:e90a3bcae1cd936aa760cffe5607266279b210d1</id>
<content type='text'>
Patch by Sasa Stankovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167548 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Delete MipsFunctionInfo::NextStackOffset. No functionality change intended. </title>
<updated>2012-11-07T19:04:26Z</updated>
<author>
<name>Akira Hatanaka</name>
<email>ahatanaka@mips.com</email>
</author>
<published>2012-11-07T19:04:26Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=7085221a593ac5cb2478a4f81e0f7212616a9afb'/>
<id>urn:sha1:7085221a593ac5cb2478a4f81e0f7212616a9afb</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167546 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>[mips] Set flag neverHasSideEffects flag on floating point conversion</title>
<updated>2012-11-03T00:53:12Z</updated>
<author>
<name>Akira Hatanaka</name>
<email>ahatanaka@mips.com</email>
</author>
<published>2012-11-03T00:53:12Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=3c77033a902af3185aa9a759c4a845fa359a475c'/>
<id>urn:sha1:3c77033a902af3185aa9a759c4a845fa359a475c</id>
<content type='text'>
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167348 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>[mips] Set flag isAsCheapAsAMove flag on instruction LUi.</title>
<updated>2012-11-03T00:26:02Z</updated>
<author>
<name>Akira Hatanaka</name>
<email>ahatanaka@mips.com</email>
</author>
<published>2012-11-03T00:26:02Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=3c9c1ab7b7549dfaf22456d89bd241a5e8dfc0a4'/>
<id>urn:sha1:3c9c1ab7b7549dfaf22456d89bd241a5e8dfc0a4</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167345 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>[mips] Stop reserving register AT and use register scavenger when a scratch</title>
<updated>2012-11-03T00:05:43Z</updated>
<author>
<name>Akira Hatanaka</name>
<email>ahatanaka@mips.com</email>
</author>
<published>2012-11-03T00:05:43Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=11a45c214c26bdc49ef58c0eb214df5200867cee'/>
<id>urn:sha1:11a45c214c26bdc49ef58c0eb214df5200867cee</id>
<content type='text'>
register is needed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167341 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>[mips] Do not reserve all 64-bit registers, but only the ones which need to be</title>
<updated>2012-11-02T23:36:01Z</updated>
<author>
<name>Akira Hatanaka</name>
<email>ahatanaka@mips.com</email>
</author>
<published>2012-11-02T23:36:01Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=da15a0ed4cd74f767cc124b65b7b7d9482969318'/>
<id>urn:sha1:da15a0ed4cd74f767cc124b65b7b7d9482969318</id>
<content type='text'>
reserved. Without this fix, RegScavenger::getRegsAvailable incorrectly
returns an empty set of integer registers.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167335 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>[mips] Use register number instead of name to print register $AT.</title>
<updated>2012-11-02T21:26:03Z</updated>
<author>
<name>Akira Hatanaka</name>
<email>ahatanaka@mips.com</email>
</author>
<published>2012-11-02T21:26:03Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=5c87b732f2bb25e43b8faf90f43bb38d607fc8ec'/>
<id>urn:sha1:5c87b732f2bb25e43b8faf90f43bb38d607fc8ec</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167315 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>[mips] Add function MipsFrameLowering::estimateStackSize.</title>
<updated>2012-11-02T21:10:22Z</updated>
<author>
<name>Akira Hatanaka</name>
<email>ahatanaka@mips.com</email>
</author>
<published>2012-11-02T21:10:22Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=265f191b57a4e359bc44a51602c9d2a4ee6af96b'/>
<id>urn:sha1:265f191b57a4e359bc44a51602c9d2a4ee6af96b</id>
<content type='text'>
This function estimates stack size and will be called before
PrologEpilogInserter scans the callee-saved registers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167313 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
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