<feed xmlns='http://www.w3.org/2005/Atom'>
<title>llvm/lib/Target/Mips/MCTargetDesc, branch master</title>
<subtitle>http://llvm.org</subtitle>
<id>https://git.amat.us/llvm/atom/lib/Target/Mips/MCTargetDesc?h=master</id>
<link rel='self' href='https://git.amat.us/llvm/atom/lib/Target/Mips/MCTargetDesc?h=master'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/'/>
<updated>2013-05-13T01:16:13Z</updated>
<entry>
<title>Remove the MachineMove class.</title>
<updated>2013-05-13T01:16:13Z</updated>
<author>
<name>Rafael Espindola</name>
<email>rafael.espindola@gmail.com</email>
</author>
<published>2013-05-13T01:16:13Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=4a971705bc6030dc2e4338b3cd5cffa2e0f88b7b'/>
<id>urn:sha1:4a971705bc6030dc2e4338b3cd5cffa2e0f88b7b</id>
<content type='text'>
It was just a less powerful and more confusing version of
MCCFIInstruction. A side effect is that, since MCCFIInstruction uses
dwarf register numbers, calls to getDwarfRegNum are pushed out, which
should allow further simplifications.

I left the MachineModuleInfo::addFrameMove interface unchanged since
this patch was already fairly big.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181680 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Remove unused argument.</title>
<updated>2013-05-10T18:16:59Z</updated>
<author>
<name>Rafael Espindola</name>
<email>rafael.espindola@gmail.com</email>
</author>
<published>2013-05-10T18:16:59Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=6e53180db120b30f600ac31611a9dd47ef7f4921'/>
<id>urn:sha1:6e53180db120b30f600ac31611a9dd47ef7f4921</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181618 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>[mips] First patch which adds support for micromips.</title>
<updated>2013-04-19T19:03:11Z</updated>
<author>
<name>Akira Hatanaka</name>
<email>ahatanaka@mips.com</email>
</author>
<published>2013-04-19T19:03:11Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=f530aff9de2738db0e3471b259ff0b577a6603e6'/>
<id>urn:sha1:f530aff9de2738db0e3471b259ff0b577a6603e6</id>
<content type='text'>
This patch adds support for recoded (meaning assembly-language compatible to
standard mips32) arithmetic 32-bit instructions.

Patch by Zoran Jovanovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179873 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Mips assembler: Enable handling of nested expressions</title>
<updated>2013-04-17T00:18:04Z</updated>
<author>
<name>Jack Carter</name>
<email>jack.carter@imgtec.com</email>
</author>
<published>2013-04-17T00:18:04Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=8afc8b7e63d5ce2d027e92934d16b19e5ba2db59'/>
<id>urn:sha1:8afc8b7e63d5ce2d027e92934d16b19e5ba2db59</id>
<content type='text'>
This patch allows the Mips assembler to parse and emit nested 
expressions as instruction operands. It also extends the 
expansion of memory instructions when an offset is given as 
an expression. 

Contributer: Vladimir Medic



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179657 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Fix the invalid opcode for Mips branch instructions in the assembler</title>
<updated>2013-03-22T00:29:10Z</updated>
<author>
<name>Jack Carter</name>
<email>jack.carter@imgtec.com</email>
</author>
<published>2013-03-22T00:29:10Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=d3107fbc54a5b5156f0aabc8788724f1469eb9df'/>
<id>urn:sha1:d3107fbc54a5b5156f0aabc8788724f1469eb9df</id>
<content type='text'>
For mips a branch an 18-bit signed offset (the 16-bit 
offset field shifted left 2 bits) is added to the 
address of the instruction following the branch 
(not the branch itself), in the branch delay slot, 
to form a PC-relative effective target address. 

Previously, the code generator did not perform the 
shift of the immediate branch offset which resulted 
in wrong instruction opcode. This patch fixes the issue.

Contributor: Vladimir Medic



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177687 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Fix the (clang -Werror) build by removing an unused member variable.</title>
<updated>2013-02-20T07:39:18Z</updated>
<author>
<name>David Blaikie</name>
<email>dblaikie@gmail.com</email>
</author>
<published>2013-02-20T07:39:18Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=5f645953555cee528cd1c0d6faa16d9b89ebba48'/>
<id>urn:sha1:5f645953555cee528cd1c0d6faa16d9b89ebba48</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175607 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>ELF symbol table field st_other support, </title>
<updated>2013-02-19T22:29:00Z</updated>
<author>
<name>Jack Carter</name>
<email>jcarter@mips.com</email>
</author>
<published>2013-02-19T22:29:00Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=5cdeca8b1d726790fe9687bc4a4d615d299bc151'/>
<id>urn:sha1:5cdeca8b1d726790fe9687bc4a4d615d299bc151</id>
<content type='text'>
excluding visibility bits.

Mips (o32 abi) specific e_header setting.

EF_MIPS_ABI_O32 needs to be set in the 
ELF header flags for o32 abi output.

Contributer: Reed Kotler


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175569 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>ELF symbol table field st_other support, </title>
<updated>2013-02-19T22:14:34Z</updated>
<author>
<name>Jack Carter</name>
<email>jcarter@mips.com</email>
</author>
<published>2013-02-19T22:14:34Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=c989c61798783f99abe7f8c27baf76bd2aea5067'/>
<id>urn:sha1:c989c61798783f99abe7f8c27baf76bd2aea5067</id>
<content type='text'>
excluding visibility bits.

Mips (Mips16) specific e_header setting.

EF_MIPS_ARCH_ASE_M16 needs to be set in the 
ELF header flags for Mips16.

Contributer: Reed Kotler


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175566 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>ELF symbol table field st_other support, </title>
<updated>2013-02-19T22:04:37Z</updated>
<author>
<name>Jack Carter</name>
<email>jcarter@mips.com</email>
</author>
<published>2013-02-19T22:04:37Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=ccb3c9c2702f548fd0a7d60a622e6f4fdf0940e7'/>
<id>urn:sha1:ccb3c9c2702f548fd0a7d60a622e6f4fdf0940e7</id>
<content type='text'>
excluding visibility bits.

Mips (MicroMips) specific STO handling .

The st_other field settig for STO_MIPS_MICROMIPS

Contributer: Zoran Jovanovic




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175564 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Remove a final dependency on the form field in tablegen; which is a remnant</title>
<updated>2013-02-15T21:05:58Z</updated>
<author>
<name>Reed Kotler</name>
<email>rkotler@mips.com</email>
</author>
<published>2013-02-15T21:05:58Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=79cd4118090a3c0bc80cafc699a51abf1d6299f3'/>
<id>urn:sha1:79cd4118090a3c0bc80cafc699a51abf1d6299f3</id>
<content type='text'>
of the old jit and which we don't intend to support in mips16 or micromips.
This dependency is for the testing of whether an instruction is a pseudo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175297 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
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