llvm/lib/Target/CellSPU, branch release_23http://llvm.orghttps://git.amat.us/llvm/atom/lib/Target/CellSPU?h=release_232008-04-30T00:30:08ZBug fixes and updates for CellSPU, syncing up with trunk. Most notable2008-04-30T00:30:08ZScott Michelscottm@aero.org2008-04-30T00:30:08Zurn:sha1:203b2d6eed0f35fc8492c78ed2ae1afa854bfbf1
fixes are target-specific lowering of frame indices, fix constants generated
for the FSMBI instruction, and fixing SPUTargetLowering::computeMaskedBitsFor-
TargetNode().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50462 91177308-0d34-0410-b5e6-96231b3b80d8
no need to implement this method and just have it call2008-04-26T22:59:59ZChris Lattnersabre@nondot.org2008-04-26T22:59:59Zurn:sha1:2ba1c06d485949d01054cada0fef1fa5be27608a
the default impl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50311 91177308-0d34-0410-b5e6-96231b3b80d8
Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal2008-04-12T04:36:06ZDan Gohmangohman@apple.com2008-04-12T04:36:06Zurn:sha1:707e0184233f27e0e9f9aee0309f2daab8cfe7f8
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.
Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.
This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.
Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.
This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49572 91177308-0d34-0410-b5e6-96231b3b80d8
Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.2008-03-31T20:40:39ZEvan Chengevan.cheng@apple.com2008-03-31T20:40:39Zurn:sha1:ca1267c02b025cc719190b05f9e1a5d174a9caf7
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48995 91177308-0d34-0410-b5e6-96231b3b80d8
Add explicit keywords.2008-03-25T22:06:05ZDan Gohmangohman@apple.com2008-03-25T22:06:05Zurn:sha1:950a4c40b823cd4f09dc71be635229246dfd6cac
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48801 91177308-0d34-0410-b5e6-96231b3b80d8
Add more patterns to match in the integer comparison test harnesses.2008-03-20T00:51:36ZScott Michelscottm@aero.org2008-03-20T00:51:36Zurn:sha1:79698f60c4693ba305ba994b8349a3f6a6d6031e
Fix bugs encountered, mostly due to range matching for immediates;
the CellSPU's 10-bit immediates are sign extended, covering a
larger range of unsigned values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48575 91177308-0d34-0410-b5e6-96231b3b80d8
Use PassManagerBase instead of FunctionPassManager for functions2008-03-11T22:29:46ZDan Gohmangohman@apple.com2008-03-11T22:29:46Zurn:sha1:bfae83139dcb4fffd50b939e1b1224b0126f04d4
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
- Style cleanup in IA64ISelLowering.h: add 'virtual' keyword for consistency.2008-03-10T23:49:09ZScott Michelscottm@aero.org2008-03-10T23:49:09Zurn:sha1:405fba12ce4874e0b599b19168b1d29d1c64ffab
- Add test pattern matching in CellSPU's icmp32.ll test harness
- Fix CellSPU fcmp.ll-generated assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48197 91177308-0d34-0410-b5e6-96231b3b80d8
Default ISD::PREFETCH to expand.2008-03-10T19:38:10ZEvan Chengevan.cheng@apple.com2008-03-10T19:38:10Zurn:sha1:d2cde68855125b6815b1575f29cd96927614b0cd
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
Integer comparison tests for CellSPU.2008-03-10T16:58:52ZScott Michelscottm@aero.org2008-03-10T16:58:52Zurn:sha1:78c47fa50b903d5dcb4e07a5c048a35cbc2add9e
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48152 91177308-0d34-0410-b5e6-96231b3b80d8