llvm/lib/Target/CellSPU, branch release_22http://llvm.orghttps://git.amat.us/llvm/atom/lib/Target/CellSPU?h=release_222008-01-15T22:02:54Zrename SDTRet -> SDTNone.2008-01-15T22:02:54ZChris Lattnersabre@nondot.org2008-01-15T22:02:54Zurn:sha1:48be23cd65313b055ca80acb843ed244b18cd980
Move definition of 'trap' sdnode up from x86 instrinfo to targetselectiondag.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46017 91177308-0d34-0410-b5e6-96231b3b80d8
improve cygwin compatibility, patch by Sam Bishop2008-01-12T22:54:07ZChris Lattnersabre@nondot.org2008-01-12T22:54:07Zurn:sha1:3f732807f3e3c9c93ee3c0f5f8b5e1b558c40be2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45917 91177308-0d34-0410-b5e6-96231b3b80d8
More CellSPU refinements:2008-01-11T21:01:19ZScott Michelscottm@aero.org2008-01-11T21:01:19Zurn:sha1:497e888daf9ba6489928e1153804ed12a7fe44c5
- struct_2.ll: Completely unaligned load/store testing
- call_indirect.ll, struct_1.ll: Add test lines to exercise
X-form [$reg($reg)] addressing
At this point, loads and stores should be under control (he says
in an optimistic tone of voice.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45882 91177308-0d34-0410-b5e6-96231b3b80d8
More CellSPU refinement and progress:2008-01-11T02:53:15ZScott Michelscottm@aero.org2008-01-11T02:53:15Zurn:sha1:9de5d0dd42463f61c4ee2f9db5f3d08153c0dacf
- Cleaned up custom load/store logic, common code is now shared [see note
below], cleaned up address modes
- More test cases: various intrinsics, structure element access (load/store
test), updated target data strings, indirect function calls.
Note: This patch contains a refactoring of the LoadSDNode and StoreSDNode
structures: they now share a common base class, LSBaseSDNode, that
provides an interface to their common functionality. There is some hackery
to access the proper operand depending on the derived class; otherwise,
to do a proper job would require finding and rearranging the SDOperands
sent to StoreSDNode's constructor. The current refactor errs on the
side of being conservatively and backwardly compatible while providing
functionality that reduces redundant code for targets where loads and
stores are custom-lowered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45851 91177308-0d34-0410-b5e6-96231b3b80d8
no need to explicitly clear these fields.2008-01-07T04:55:09ZChris Lattnersabre@nondot.org2008-01-07T04:55:09Zurn:sha1:7358c193fd2c7e6cc844f72e2203cbdb7692759f
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45683 91177308-0d34-0410-b5e6-96231b3b80d8
remove MachineOpCode typedef.2008-01-07T02:48:55ZChris Lattnersabre@nondot.org2008-01-07T02:48:55Zurn:sha1:cc8cd0cbf12c12916d4b38ef0de5be5501c8270e
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45679 91177308-0d34-0410-b5e6-96231b3b80d8
Move even more functionality from MRegisterInfo into TargetInstrInfo.2008-01-07T01:35:02ZOwen Andersonresistor@mac.com2008-01-07T01:35:02Zurn:sha1:43dbe05279b753aabda571d9c83eaeb36987001a
Some day I'll get it all moved over...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45672 91177308-0d34-0410-b5e6-96231b3b80d8
rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.2008-01-06T23:38:27ZChris Lattnersabre@nondot.org2008-01-06T23:38:27Zurn:sha1:834f1ce0312e3d00d836f9560cb63182c2c4570f
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8
Change the 'isStore' inferrer to look for 'SDNPMayStore' 2008-01-06T06:44:58ZChris Lattnersabre@nondot.org2008-01-06T06:44:58Zurn:sha1:c8478d8b12c2d7e4cea32d0c9940f5cac2baa4dd
instead of "ISD::STORE". This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores). This allows us to remove
more explicit isStore flags from the .td files.
Finally, add a warning for when a .td file contains an explicit
isStore and tblgen is able to infer it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45654 91177308-0d34-0410-b5e6-96231b3b80d8
Move some more instruction creation methods from RegisterInfo into InstrInfo.2008-01-01T21:11:32ZOwen Andersonresistor@mac.com2008-01-01T21:11:32Zurn:sha1:f6372aa1cc568df19da7c5023e83c75aa9404a07
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8