llvm/lib/Target/ARM/InstPrinter, branch release_32http://llvm.orghttps://git.amat.us/llvm/atom/lib/Target/ARM/InstPrinter?h=release_322012-10-30T01:04:51ZARM: Better disassembly for pc-relative LDR.2012-10-30T01:04:51ZJim Grosbachgrosbach@apple.com2012-10-30T01:04:51Zurn:sha1:8ba1474181fc3997cc8449d75065e1021c72d49b
When the operand is a plain immediate rather than a label, print it
as [pc, #imm] like we do for the Thumb2 wide encoding variant.
rdar://12154503
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166991 91177308-0d34-0410-b5e6-96231b3b80d8
Make branch heavy code for generating marked up disassembly simpler2012-10-23T22:52:52ZKevin Enderbyenderby@apple.com2012-10-23T22:52:52Zurn:sha1:e1d4a8813427b76c5f59cf5b70a9df734b7e9284
and easier to read by adding a couple helper functions. Suggestion by
Chandler Carruth and seconded by Meador Inge!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166515 91177308-0d34-0410-b5e6-96231b3b80d8
Add support for annotated disassembly output for X86 and arm.2012-10-22T22:31:46ZKevin Enderbyenderby@apple.com2012-10-22T22:31:46Zurn:sha1:3ed0316f756e2f1730f46654776fcf77f5ace7aa
Per the October 12, 2012 Proposal for annotated disassembly output sent out by
Jim Grosbach this set of changes implements this for X86 and arm. The llvm-mc
tool now has a -mdis option to produced the marked up disassembly and a couple
of small example test cases have been added.
rdar://11764962
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166445 91177308-0d34-0410-b5e6-96231b3b80d8
ARMInstPrinter.cpp: Fix a warning in -Asserts. [-Wunused-variable]2012-09-22T13:12:28ZNAKAMURA Takumigeek4civic@gmail.com2012-09-22T13:12:28Zurn:sha1:d15e2a08578fe7028196037d9a35c834f0e0b7f8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164459 91177308-0d34-0410-b5e6-96231b3b80d8
Whitespace.2012-09-22T13:12:22ZNAKAMURA Takumigeek4civic@gmail.com2012-09-22T13:12:22Zurn:sha1:2d67eac2e6c866e6181d159f5c0e71b6e804f672
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164458 91177308-0d34-0410-b5e6-96231b3b80d8
Fix edge cases of ARM shift operands in arith instructions.2012-09-22T11:18:19ZTim NorthoverTim.Northover@arm.com2012-09-22T11:18:19Zurn:sha1:bb5174246b5d0dfbd057b3641f5e134fe74ea0f4
As before with load instructions, oddities like "asr #32", "rrx" could
be printed incorrectly.
Patch by Chris Lidbury.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164456 91177308-0d34-0410-b5e6-96231b3b80d8
Fix the handling of edge cases in ARM shifted operands.2012-09-22T11:18:12ZTim NorthoverTim.Northover@arm.com2012-09-22T11:18:12Zurn:sha1:93c7c449a1351542fa5a275587187154dbedb8e0
This patch fixes load/store instructions to handle less common cases
like "asr #32", "rrx" properly throughout the MC layer.
Patch by Chris Lidbury.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164455 91177308-0d34-0410-b5e6-96231b3b80d8
Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset index issue.2012-08-02T08:29:50ZJiangning Liujiangning.liu@arm.com2012-08-02T08:29:50Zurn:sha1:fd652df8b36a9d3e6b09ae2b9f7bcb07e88fdfaa
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161162 91177308-0d34-0410-b5e6-96231b3b80d8
Fix #13241, a bug around shift immediate operand for ARM instruction ADR.2012-08-02T08:13:13ZJiangning Liujiangning.liu@arm.com2012-08-02T08:13:13Zurn:sha1:1fb27eccf5b7eabde9678d84411eb1df8a693683
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161159 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: Define generic HINT instruction.2012-06-18T19:45:50ZJim Grosbachgrosbach@apple.com2012-06-18T19:45:50Zurn:sha1:7e99a60857532ca2973cf9dabc790d84a2e15a8a
The NOP, WFE, WFI, SEV and YIELD instructions are all hints w/
a different immediate value in bits [7,0]. Define a generic HINT
instruction and refactor NOP, WFI, WFI, SEV and YIELD to be
assembly aliases of that.
rdar://11600518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158674 91177308-0d34-0410-b5e6-96231b3b80d8