llvm/lib/Target/ARM/Disassembler, branch release_29http://llvm.orghttps://git.amat.us/llvm/atom/lib/Target/ARM/Disassembler?h=release_292011-03-03T01:41:01Zpr9367: Add missing predicated BLX instructions.2011-03-03T01:41:01ZBob Wilsonbob.wilson@apple.com2011-03-03T01:41:01Zurn:sha1:181d3fe727022160ce8932e355eae8b3ff478592
Patch by Jyun-Yan You, with some minor adjustments and a testcase from me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126915 91177308-0d34-0410-b5e6-96231b3b80d8
Add missing whitespace in the formatting.2011-02-28T21:45:12ZKevin Enderbyenderby@apple.com2011-02-28T21:45:12Zurn:sha1:4da434cd40b3ae9ea6ff3bef8881d17cca608420
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126687 91177308-0d34-0410-b5e6-96231b3b80d8
Fix the arm's disassembler for blx that was building an MCInst without the2011-02-28T18:46:31ZKevin Enderbyenderby@apple.com2011-02-28T18:46:31Zurn:sha1:d436d5b1c993c78b6c267b5fc1056d593f07921f
needed two predicate operands before the imm operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126662 91177308-0d34-0410-b5e6-96231b3b80d8
Add assembly parsing support for "msr" and also fix its encoding. Also add2011-02-18T19:45:59ZBruno Cardoso Lopesbruno.cardoso@gmail.com2011-02-18T19:45:59Zurn:sha1:584bf7bb03e4cf1475b26851edcc1ddb66b85028
testcases for the disassembler to make sure it still works for "msr".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125948 91177308-0d34-0410-b5e6-96231b3b80d8
Fix encoding and add parsing support for the arm/thumb CPS instruction:2011-02-14T13:09:44ZBruno Cardoso Lopesbruno.cardoso@gmail.com2011-02-14T13:09:44Zurn:sha1:a2b6e4151b75248f9dbf8067186cba673520f8f4
- Add custom operand matching for imod and iflags.
- Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC
from mnemonic.
- While adding ".w" as an operand, don't change "Head" to avoid passing the
wrong mnemonic to ParseOperand.
- Add asm parser tests.
- Add disassembler tests just to make sure it can catch all cps versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125489 91177308-0d34-0410-b5e6-96231b3b80d8
Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 (which worked around it). This should get us back to the old, correct behavior, though it will make the integrated assembler unhappy for the time being.2011-02-08T22:39:40ZOwen Andersonresistor@mac.com2011-02-08T22:39:40Zurn:sha1:971b83b67a9812556cdb97bb58aa96fb37af458d
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125127 91177308-0d34-0410-b5e6-96231b3b80d8
PR9030: Fix disassembly of ARM "mov pc, lr" instruction.2011-01-28T17:50:30ZBob Wilsonbob.wilson@apple.com2011-01-28T17:50:30Zurn:sha1:d11c57a93753e7fd9fdac110e81c88eb56a847e4
Patch by Jyun-Yan You.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124492 91177308-0d34-0410-b5e6-96231b3b80d8
CMake: Add disabling optimization on MSVC8 and MSVC10 as workaround for some files in Target/ARM and Target/X86.2010-12-29T03:59:27ZNAKAMURA Takumigeek4civic@gmail.com2010-12-29T03:59:27Zurn:sha1:7d63a2c2e8da75eeb2d36dd93adf33f7658d0083
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122623 91177308-0d34-0410-b5e6-96231b3b80d8
Second attempt at converting Thumb2's LDRpci, including updating the gazillion places that need to know about it.2010-12-07T00:45:21ZOwen Andersonresistor@mac.com2010-12-07T00:45:21Zurn:sha1:eb6779c5b98383e33542207f062102e79263df16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121082 91177308-0d34-0410-b5e6-96231b3b80d8
Add correct encodings for STRD and LDRD, including fixup support. Additionally, update these to unified syntax.2010-12-01T19:18:46ZOwen Andersonresistor@mac.com2010-12-01T19:18:46Zurn:sha1:9d63d90de5e57ad96f467b270544443a9284eb2b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120589 91177308-0d34-0410-b5e6-96231b3b80d8