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<title>llvm/lib/CodeGen/SelectionDAG, branch release_33</title>
<subtitle>http://llvm.org</subtitle>
<id>https://git.amat.us/llvm/atom/lib/CodeGen/SelectionDAG?h=release_33</id>
<link rel='self' href='https://git.amat.us/llvm/atom/lib/CodeGen/SelectionDAG?h=release_33'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/'/>
<updated>2013-05-06T08:06:13Z</updated>
<entry>
<title>Fix slightly too aggressive conact_vector optimization.</title>
<updated>2013-05-06T08:06:13Z</updated>
<author>
<name>Michael Kuperstein</name>
<email>michael.m.kuperstein@intel.com</email>
</author>
<published>2013-05-06T08:06:13Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=2720248ae5b0201a7bdba57f3625869b578f2a5d'/>
<id>urn:sha1:2720248ae5b0201a7bdba57f3625869b578f2a5d</id>
<content type='text'>
(Would sometimes optimize away conacts used to extend a vector with undef values)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181186 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Add ArrayRef constructor from None, and do the cleanups that this constructor enables</title>
<updated>2013-05-05T00:40:33Z</updated>
<author>
<name>Dmitri Gribenko</name>
<email>gribozavr@gmail.com</email>
</author>
<published>2013-05-05T00:40:33Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=5c332dbd30d9398ed25b30c3080506f7b8e92290'/>
<id>urn:sha1:5c332dbd30d9398ed25b30c3080506f7b8e92290</id>
<content type='text'>
Patch by Robert Wilhelm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181138 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>[inline asm] Return an undef SDValue of the expected value type, rather than</title>
<updated>2013-05-01T19:49:26Z</updated>
<author>
<name>Chad Rosier</name>
<email>mcrosier@apple.com</email>
</author>
<published>2013-05-01T19:49:26Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=f0b0755b6ea0b5c55bbf51ddd29439c01c7102e5'/>
<id>urn:sha1:f0b0755b6ea0b5c55bbf51ddd29439c01c7102e5</id>
<content type='text'>
report a fatal error.  This allows us to continue processing the translation
unit.  Test case to come on the clang side because we need an inline asm
diagnostics handler in place.
rdar://13446483

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180873 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Optimize away nop CONCAT_VECTOR nodes.</title>
<updated>2013-05-01T19:18:51Z</updated>
<author>
<name>Nadav Rotem</name>
<email>nrotem@apple.com</email>
</author>
<published>2013-05-01T19:18:51Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=b2ed5fac0693e949ffdbf45266f5d53839211b63'/>
<id>urn:sha1:b2ed5fac0693e949ffdbf45266f5d53839211b63</id>
<content type='text'>
Optimize CONCAT_VECTOR nodes that merge EXTRACT_SUBVECTOR values that extract from the same vector.

rdar://13402653
PR15866



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180871 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Only pass 'returned' to target-specific lowering code when the value of entire register is guaranteed to be preserved.</title>
<updated>2013-04-30T22:49:28Z</updated>
<author>
<name>Stephen Lin</name>
<email>stephenwlin@gmail.com</email>
</author>
<published>2013-04-30T22:49:28Z</published>
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<id>urn:sha1:3484da9479a4daff3efc7febe004e1f4d69b3b4a</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180825 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Temporarily revert "Change the informal convention of DBG_VALUE so that we can express a"</title>
<updated>2013-04-30T22:35:14Z</updated>
<author>
<name>Adrian Prantl</name>
<email>aprantl@apple.com</email>
</author>
<published>2013-04-30T22:35:14Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=86a87d9ba1faf153e0e6eaddfd3e95595c83bcb1'/>
<id>urn:sha1:86a87d9ba1faf153e0e6eaddfd3e95595c83bcb1</id>
<content type='text'>
because it breaks some buildbots.

This reverts commit 180816.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180819 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Change the informal convention of DBG_VALUE so that we can express a</title>
<updated>2013-04-30T22:16:46Z</updated>
<author>
<name>Adrian Prantl</name>
<email>aprantl@apple.com</email>
</author>
<published>2013-04-30T22:16:46Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=a2b56692c8b824b8cc4a0927bb555f3718e9bee8'/>
<id>urn:sha1:a2b56692c8b824b8cc4a0927bb555f3718e9bee8</id>
<content type='text'>
register-indirect address with an offset of 0.
It used to be that a DBG_VALUE is a register-indirect value if the offset
(operand 1) is nonzero. The new convention is that a DBG_VALUE is
register-indirect if the first operand is a register and the second
operand is an immediate. For plain registers use the combination reg, reg.

rdar://problem/13658587

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180816 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Re-write the address propagation code for pre-indexed loads/stores to take into account some previously misssed cases (PRE_DEC addressing mode, the offset and base address are swapped, etc). This should fix PR15581.</title>
<updated>2013-04-26T15:52:24Z</updated>
<author>
<name>Silviu Baranga</name>
<email>silviu.baranga@arm.com</email>
</author>
<published>2013-04-26T15:52:24Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=730a570c8c1b84f650ae92bacd61c88cfef9c6a4'/>
<id>urn:sha1:730a570c8c1b84f650ae92bacd61c88cfef9c6a4</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180609 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>DAGCombiner: Canonicalize vector integer abs in the same way we do it for scalars.</title>
<updated>2013-04-26T09:19:19Z</updated>
<author>
<name>Benjamin Kramer</name>
<email>benny.kra@googlemail.com</email>
</author>
<published>2013-04-26T09:19:19Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=6242fda42ad13eebc908e744426ae7bc8cf8d1c3'/>
<id>urn:sha1:6242fda42ad13eebc908e744426ae7bc8cf8d1c3</id>
<content type='text'>
This already helps SSE2 x86 a lot because it lacks an efficient way to
represent a vector select. The long term goal is to enable the backend to match
a canonicalized pattern into a single instruction (e.g. vabs or pabs).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180597 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Fix constant folding for one lane vector types. Constant folding one lane vector types not returns a vector instead of a scalar.</title>
<updated>2013-04-25T09:32:33Z</updated>
<author>
<name>Silviu Baranga</name>
<email>silviu.baranga@arm.com</email>
</author>
<published>2013-04-25T09:32:33Z</published>
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<id>urn:sha1:02066838b5cdf17277267e79ffbc9459a58cdd59</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180254 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
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