/*
* wm8983.c -- WM8983 ALSA SoC Audio driver
*
* Copyright 2011 Wolfson Microelectronics plc
*
* Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/tlv.h>
#include "wm8983.h"
static const struct reg_default wm8983_defaults[] = {
{ 0x01, 0x0000 }, /* R1 - Power management 1 */
{ 0x02, 0x0000 }, /* R2 - Power management 2 */
{ 0x03, 0x0000 }, /* R3 - Power management 3 */
{ 0x04, 0x0050 }, /* R4 - Audio Interface */
{ 0x05, 0x0000 }, /* R5 - Companding control */
{ 0x06, 0x0140 }, /* R6 - Clock Gen control */
{ 0x07, 0x0000 }, /* R7 - Additional control */
{ 0x08, 0x0000 }, /* R8 - GPIO Control */
{ 0x09, 0x0000 }, /* R9 - Jack Detect Control 1 */
{ 0x0A, 0x0000 }, /* R10 - DAC Control */
{ 0x0B, 0x00FF }, /* R11 - Left DAC digital Vol */
{ 0x0C, 0x00FF }, /* R12 - Right DAC digital vol */
{ 0x0D, 0x0000 }, /* R13 - Jack Detect Control 2 */
{ 0x0E, 0x0100 }, /* R14 - ADC Control */
{ 0x0F, 0x00FF }, /* R15 - Left ADC Digital Vol */
{ 0x10, 0x00FF }, /* R16 - Right ADC Digital Vol */
{ 0x12, 0x012C }, /* R18 - EQ1 - low shelf */
{ 0x13, 0x002C }, /* R19 - EQ2 - peak 1 */
{ 0x14, 0x002C }, /* R20 - EQ3 - peak 2 */
{ 0x15, 0x002C }, /* R21 - EQ4 - peak 3 */
{ 0x16, 0x002C }, /* R22 - EQ5 - high shelf */
{ 0x18, 0x0032 }, /* R24 - DAC Limiter 1 */
{ 0x19, 0x0000 }, /* R25 - DAC Limiter 2 */
{ 0x1B, 0x0000 }, /* R27 - Notch Filter 1 */
{ 0x1C, 0x0000 }, /* R28 - Notch Filter 2 */
{ 0x1D, 0x0000 }, /* R29 - Notch Filter 3 */
{ 0x1E, 0x0000 }, /* R30 - Notch Filter 4 */
{ 0x20, 0x0038 }, /* R32 - ALC control 1 */
{ 0x21, 0x000B }, /* R33 - ALC control 2 */
{ 0x22, 0x0032 }, /* R34 - ALC control 3 */
{ 0x23, 0x0000 }, /* R35 - Noise Gate */
{ 0x24, 0x0008 }, /* R36 - PLL N */
{ 0x25, 0x000C }, /* R37 - PLL K 1 */
{ 0x26, 0x0093 }, /* R38 - PLL K 2 */
{ 0x27, 0x00E9 }, /* R39 - PLL K 3 */
{ 0x29, 0x0000 }, /* R41 - 3D control */
{ 0x2A, 0x0000 }, /* R42 - OUT4 to ADC */
{ 0x2B, 0x0000 }, /* R43 - Beep control */
{ 0x2C, 0x0033 }, /* R44 - Input ctrl */
{ 0x2D, 0x0010 }, /* R45 - Left INP PGA gain ctrl */
{ 0x2E, 0x0010 }, /* R46 - Right INP PGA g