path: root/sound/oss/cs4281/cs4281_hwdefs.h

//****************************************************************************
//
// HWDEFS.H - Definitions of the registers and data structures used by the
//            CS4281
//
// Copyright (c) 1999,2000,2001 Crystal Semiconductor Corp.
//
//****************************************************************************

#ifndef _H_HWDEFS
#define _H_HWDEFS

//****************************************************************************
//
// The following define the offsets of the registers located in the PCI
// configuration space of the CS4281 part.
//
//****************************************************************************
#define PCICONFIG_DEVID_VENID                   0x00000000L
#define PCICONFIG_STATUS_COMMAND                0x00000004L
#define PCICONFIG_CLASS_REVISION                0x00000008L
#define PCICONFIG_LATENCY_TIMER                 0x0000000CL
#define PCICONFIG_BA0                           0x00000010L
#define PCICONFIG_BA1                           0x00000014L
#define PCICONFIG_SUBSYSID_SUBSYSVENID          0x0000002CL
#define PCICONFIG_INTERRUPT                     0x0000003CL

//****************************************************************************
//
// The following define the offsets of the registers accessed via base address
// register zero on the CS4281 part.
//
//****************************************************************************
#define BA0_HISR                                0x00000000L
#define BA0_HICR                                0x00000008L
#define BA0_HIMR                                0x0000000CL
#define BA0_IIER                                0x00000010L
#define BA0_HDSR0                               0x000000F0L
#define BA0_HDSR1                               0x000000F4L
#define BA0_HDSR2                               0x000000F8L
#define BA0_HDSR3                               0x000000FCL
#define BA0_DCA0                                0x00000110L
#define BA0_DCC0                                0x00000114L
#define BA0_DBA0                                0x00000118L
#define BA0_DBC0                                0x0000011CL
#define BA0_DCA1                                0x00000120L
#define BA0_DCC1                                0x00000124L
#define BA0_DBA1                                0x00000128L
#define BA0_DBC1                                0x0000012CL
#define BA0_DCA2                                0x00000130L
#define BA0_DCC2                                0x00000134L
#define BA0_DBA2                                0x00000138L
#define BA0_DBC2                                0x0000013CL
#define BA0_DCA3                                0x00000140L
#define BA0_DCC3                                0x00000144L
#define BA0_DBA3                                0x00000148L
#define BA0_DBC3                                0x0000014CL
#define BA0_DMR0                                0x00000150L
#define BA0_DCR0                                0x00000154L
#define BA0_DMR1                                0x00000158L
#define BA0_DCR1                                0x0000015CL
#define BA0_DMR2                                0x00000160L
#define BA0_DCR2                                0x00000164L
#define BA0_DMR3                                0x00000168L
#define BA0_DCR3                                0x0000016CL
#define BA0_DLMR                                0x00000170L
#define BA0_DLSR                                0x00000174L
#define BA0_FCR0                                0x00000180L
#define BA0_FCR1                                0x00000184L
#define BA0_FCR2                                0x00000188L
#define BA0_FCR3                                0x0000018CL
#define BA0_FPDR0                               0x00000190L
#define BA0_FPDR1                               0x00000194L
#define BA0_FPDR2                               0x00000198L
#define BA0_FPDR3                               0x0000019CL
#define BA0_FCHS                                0x0000020CL
#define BA0_FSIC0                               0x00000210L
#define BA0_FSIC1                               0x00000214L
#define BA0_FSIC2                               0x00000218L
#define BA0_FSIC3                               0x0000021CL
#define BA0_PCICFG00                            0x00000300L
#define BA0_PCICFG04                            0x00000304L
#define BA0_PCICFG08                            0x00000308L
#define BA0_PCICFG0C                            0x0000030CL
#define BA0_PCICFG10                            0x00000310L
#define BA0_PCICFG14                            0x00000314L
#define BA0_PCICFG18                            0x00000318L
#define BA0_PCICFG1C                            0x0000031CL
#define BA0_PCICFG20                            0x00000320L
#define BA0_PCICFG24                            0x00000324L
#define BA0_PCICFG28                            0x00000328L
#define BA0_PCICFG2C                            0x0000032CL
#define BA0_PCICFG30                            0x00000330L
#define BA0_PCICFG34                            0x00000334L
#define BA0_PCICFG38                            0x00000338L
#define BA0_PCICFG3C                            0x0000033CL
#define BA0_PCICFG40                            0x00000340L
#define BA0_PMCS                                0x00000344L
#define BA0_CWPR                                0x000003E0L
#define BA0_EPPMC                               0x000003E4L
#define BA0_GPIOR                               0x000003E8L
#define BA0_SPMC                                0x000003ECL
#define BA0_CFLR                                0x000003F0L
#define BA0_IISR                                0x000003F4L
#define BA0_TMS                                 0x000003F8L
#define BA0_SSVID                               0x000003FCL
#define BA0_CLKCR1                              0x00000400L
#define BA0_FRR                                 0x00000410L
#define BA0_SLT12O                              0x0000041CL
#define BA0_SERMC                               0x00000420L
#define BA0_SERC1                               0x00000428L
#define BA0_SERC2                               0x0000042CL
#define BA0_SLT12M                              0x0000045CL
#define BA0_ACCTL                               0x00000460L
#define BA0_ACSTS                               0x00000464L
#define BA0_ACOSV                               0x00000468L
#define BA0_ACCAD                               0x0000046CL
#define BA0_ACCDA                               0x00000470L
#define BA0_ACISV                               0x00000474L
#define BA0_ACSAD                               0x00000478L
#define BA0_ACSDA                               0x0000047CL
#define BA0_JSPT                                0x00000480L
#define BA0_JSCTL                               0x00000484L
#define BA0_MIDCR                               0x00000490L
#define BA0_MIDCMD                              0x00000494L
#define BA0_MIDSR                               0x00000494L
#define BA0_MIDWP                               0x00000498L
#define BA0_MIDRP                               0x0000049CL
#define BA0_AODSD1                              0x000004A8L
#define BA0_AODSD2                              0x000004ACL
#define BA0_CFGI                                0x000004B0L
#define BA0_SLT12M2                             0x000004DCL
#define BA0_ACSTS2                              0x000004E4L
#define BA0_ACISV2                              0x000004F4L
#define BA0_ACSAD2                              0x000004F8L
#define BA0_ACSDA2                              0x000004FCL
#define BA0_IOTGP                               0x00000500L
#define BA0_IOTSB                               0x00000504L
#define BA0_IOTFM                               0x00000508L
#define BA0_IOTDMA                              0x0000050CL
#define BA0_IOTAC0                              0x00000500L
#define BA0_IOTAC1                              0x00000504L
#define BA0_IOTAC2                              0x00000508L
#define BA0_IOTAC3                              0x0000050CL
#define BA0_IOTPCP                              0x0000052CL
#define BA0_IOTCC                               0x00000530L
#define BA0_IOTCR                               0x0000058CL
#define BA0_PCPRR                               0x00000600L
#define BA0_PCPGR                               0x00000604L
#define BA0_PCPCR                               0x00000608L
#define BA0_PCPCIEN                             0x00000608L
#define BA0_SBMAR                               0x00000700L
#define BA0_SBMDR                               0x00000704L
#define BA0_SBRR                                0x00000708L
#define BA0_SBRDP                               0x0000070CL
#define BA0_SBWDP                               0x00000710L
#define BA0_SBWBS                               0x00000710L
#define BA0_SBRBS                               0x00000714L
#define BA0_FMSR                                0x00000730L
#define BA0_B0AP                                0x00000730L
#define BA0_FMDP                                0x00000734L
#define BA0_B1AP                                0x00000738L
#define BA0_B1DP                                0x0000073CL
#define BA0_SSPM                                0x00000740L
#define BA0_DACSR                               0x00000744L
#define BA0_ADCSR                               0x00000748L
#define BA0_SSCR                                0x0000074CL
#define BA0_FMLVC                               0x00000754L
#define BA0_FMRVC                               0x00000758L
#define BA0_SRCSA                               0x0000075CL
#define BA0_PPLVC                               0x00000760L
#define BA0_PPRVC                               0x00000764L
#define BA0_PASR                                0x00000768L
#define BA0_CASR                                0x0000076CL

//****************************************************************************
//
// The following define the offsets of the AC97 shadow registers, which appear
// as a virtual extension to the base address register zero memory range.
//