1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
|
#ifndef _LMC_VAR_H_
#define _LMC_VAR_H_
/* $Id: lmc_var.h,v 1.17 2000/04/06 12:16:47 asj Exp $ */
/*
* Copyright (c) 1997-2000 LAN Media Corporation (LMC)
* All rights reserved. www.lanmedia.com
*
* This code is written by:
* Andrew Stanley-Jones (asj@cban.com)
* Rob Braun (bbraun@vix.com),
* Michael Graff (explorer@vix.com) and
* Matt Thomas (matt@3am-software.com).
*
* This software may be used and distributed according to the terms
* of the GNU General Public License version 2, incorporated herein by reference.
*/
#include <linux/timer.h>
#ifndef __KERNEL__
typedef signed char s8;
typedef unsigned char u8;
typedef signed short s16;
typedef unsigned short u16;
typedef signed int s32;
typedef unsigned int u32;
typedef signed long long s64;
typedef unsigned long long u64;
#define BITS_PER_LONG 32
#endif
/*
* basic definitions used in lmc include files
*/
typedef struct lmc___softc lmc_softc_t;
typedef struct lmc___media lmc_media_t;
typedef struct lmc___ctl lmc_ctl_t;
#define lmc_csrptr_t unsigned long
#define u_int16_t u16
#define u_int8_t u8
#define tulip_uint32_t u32
#define LMC_REG_RANGE 0x80
#define LMC_PRINTF_FMT "%s"
#define LMC_PRINTF_ARGS (sc->lmc_device->name)
#define TX_TIMEOUT (2*HZ)
#define LMC_TXDESCS 32
#define LMC_RXDESCS 32
#define LMC_LINK_UP 1
#define LMC_LINK_DOWN 0
/* These macros for generic read and write to and from the dec chip */
#define LMC_CSR_READ(sc, csr) \
inl((sc)->lmc_csrs.csr)
#define LMC_CSR_WRITE(sc, reg, val) \
outl((val), (sc)->lmc_csrs.reg)
//#ifdef _LINUX_DELAY_H
// #define SLOW_DOWN_IO udelay(2);
// #undef __SLOW_DOWN_IO
// #define __SLOW_DOWN_IO udelay(2);
//#endif
#define DELAY(n) SLOW_DOWN_IO
#define lmc_delay() inl(sc->lmc_csrs.csr_9)
/* This macro sync's up with the mii so that reads and writes can take place */
#define LMC_MII_SYNC(sc) do {int n=32; while( n >= 0 ) { \
LMC_CSR_WRITE((sc), csr_9, 0x20000); \
lmc_delay(); \
LMC_CSR_WRITE((sc), csr_9, 0x30000); \
lmc_delay(); \
n--; }} while(0)
struct lmc_regfile_t {
lmc_csrptr_t csr_busmode; /* CSR0 */
lmc_csrptr_t csr_txpoll; /* CSR1 */
lmc_csrptr_t csr_rxpoll; /* CSR2 */
lmc_csrptr_t csr_rxlist; /* CSR3 */
lmc_csrptr_t csr_txlist; /* CSR4 */
lmc_csrptr_t csr_status; /* CSR5 */
lmc_csrptr_t csr_command; /* CSR6 */
lmc_csrptr_t csr_intr; /* CSR7 */
lmc_csrptr_t csr_missed_frames; /* CSR8 */
lmc_csrptr_t csr_9; /* CSR9 */
lmc_csrptr_t csr_10; /* CSR10 */
lmc_csrptr_t csr_11; /* CSR11 */
lmc_csrptr_t csr_12; /* CSR12 */
lmc_csrptr_t csr_13; /* CSR13 */
lmc_csrptr_t csr_14; /* CSR14 */
lmc_csrptr_t csr_15; /* CSR15 */
};
#define csr_enetrom csr_9 /* 21040 */
#define csr_reserved csr_10 /* 21040 */
#define csr_full_duplex csr_11 /* 21040 */
#define csr_bootrom csr_10 /* 21041/21140A/?? */
#define csr_gp csr_12 /* 21140* */
#define csr_watchdog csr_15 /* 21140* */
#define csr_gp_timer csr_11 /* 21041/21140* */
#define csr_srom_mii csr_9 /* 21041/21140* */
#define csr_sia_status csr_12 /* 2104x */
#define csr_sia_connectivity csr_13 /* 2104x */
#define csr_sia_tx_rx csr_14 /* 2104x */
#define csr_sia_general csr_15 /* 2104x */
/* tulip length/control transmit descriptor definitions
* used to define bits in the second tulip_desc_t field (length)
* for the transmit descriptor -baz */
#define LMC_TDES_FIRST_BUFFER_SIZE ((u_int32_t)(0x000007FF))
#define LMC_TDES_SECOND_BUFFER_SIZE ((u_int32_t)(0x003FF800))
#define LMC_TDES_HASH_FILTERING ((u_int32_t)(0x00400000))
#define LMC_TDES_DISABLE_PADDING ((u_int32_t)(0x00800000))
#define LMC_TDES_SECOND_ADDR_CHAINED ((u_int32_t)(0x01000000))
#define LMC_TDES_END_OF_RING ((u_int32_t)(0x02000000))
#define LMC_TDES_ADD_CRC_DISABLE ((u_int32_t)(0x04000000))
#define LMC_TDES_SETUP_PACKET ((u_int32_t)(0x08000000))
#define LMC_TDES_INVERSE_FILTERING ((u_int32_t)(0x10000000))
#define LMC_TDES_FIRST_SEGMENT ((u_int32_t)(0x20000000))
#define LMC_TDES_LAST_SEGMENT ((u_int32_t)(0x40000000))
#define LMC_TDES_INTERRUPT_ON_COMPLETION ((u_int32_t)(0x80000000))
#define TDES_SECOND_BUFFER_SIZE_BIT_NUMBER 11
#define TDES_COLLISION_COUNT_BIT_NUMBER 3
/* Constants for the RCV descriptor RDES */
#define LMC_RDES_OVERFLOW ((u_int32_t)(0x00000001))
#define LMC_RDES_CRC_ERROR ((u_int32_t)(0x00000002))
#define LMC_RDES_DRIBBLING_BIT ((u_int32_t)(0x00000004))
#define LMC_RDES_REPORT_ON_MII_ERR ((u_int32_t)(0x00000008))
#define LMC_RDES_RCV_WATCHDOG_TIMEOUT ((u_int32_t)(0x00000010))
#define LMC_RDES_FRAME_TYPE ((u_int32_t)(0x00000020))
#define LMC_RDES_COLLISION_SEEN ((u_int32_t)(0x00000040))
#define LMC_RDES_FRAME_TOO_LONG ((u_int32_t)(0x00000080))
#define LMC_RDES_LAST_DESCRIPTOR ((u_int32_t)(0x00000100))
#define LMC_RDES_FIRST_DESCRIPTOR ((u_int32_t)(0x00000200))
#define LMC_RDES_MULTICAST_FRAME ((u_int32_t)(0x00000400))
#define LMC_RDES_RUNT_FRAME ((u_int32_t)(0x00000800))
#define LMC_RDES_DATA_TYPE ((u_int32_t)(0x00003000))
#define LMC_RDES_LENGTH_ERROR ((u_int32_t)(0x00004000))
#define LMC_RDES_ERROR_SUMMARY ((u_int32_t)(0x00008000))
#define LMC_RDES_FRAME_LENGTH ((u_int32_t)(0x3FFF0000))
#define LMC_RDES_OWN_BIT ((u_int32_t)(0x80000000))
#define RDES_FRAME_LENGTH_BIT_NUMBER 16
#define LMC_RDES_ERROR_MASK ( (u_int32_t)( \
LMC_RDES_OVERFLOW \
| LMC_RDES_DRIBBLING_BIT \
| LMC_RDES_REPORT_ON_MII_ERR \
| LMC_RDES_COLLISION_SEEN ) )
/*
* Ioctl info
*/
typedef struct {
u_int32_t n;
u_int32_t m;
u_int32_t v;
u_int32_t x;
u_int32_t r;
u_int32_t f;
u_int32_t exact;
} lmc_av9110_t;
/*
* Common structure passed to the ioctl code.
*/
struct lmc___ctl {
u_int32_t cardtype;
u_int32_t clock_source; /* HSSI, T1 */
u_int32_t clock_rate; /* T1 */
u_int32_t crc_length;
u_int32_t cable_length; /* DS3 */
u_int32_t scrambler_onoff; /* DS3 */
u_int32_t cable_type; /* T1 */
u_int32_t keepalive_onoff; /* protocol */
u_int32_t ticks; /* ticks/sec */
union {
lmc_av9110_t ssi;
} cardspec;
u_int32_t circuit_type; /* T1 or E1 */
};
/*
* Carefull, look at the data sheet, there's more to this
* structure than meets the eye. It should probably be:
*
* struct tulip_desc_t {
* u8 own:1;
* u32 status:31;
* u32 control:10;
* u32 buffer1;
* u32 buffer2;
* };
* You could also expand status control to provide more bit information
*/
struct tulip_desc_t {
s32 status;
s32 length;
u32 buffer1;
u32 buffer2;
};
/*
* media independent methods to check on media status, link, light LEDs,
* etc.
*/
struct lmc___media {
void (* init)(lmc_softc_t * const);
void (* defaults)(lmc_softc_t * const);
void (* set_status)(lmc_softc_t * const, lmc_ctl_t *);
void (* set_clock_source)(lmc_softc_t * const, int);
void (* set_speed)(lmc_softc_t * const, lmc_ctl_t *);
void (* set_cable_length)(lmc_softc_t * const, int);
void (* set_scrambler)(lmc_softc_t * const, int);
int (* get_link_status)(lmc_softc_t * const);
void (* set_link_status)(lmc_softc_t * const, int);
void (* set_crc_length)(lmc_softc_t * const, int);
void (* set_circuit_type)(lmc_softc_t * const, int);
void (* watchdog)(lmc_softc_t * const);
};
#define STATCHECK 0xBEEFCAFE
/* Included in this structure are first
* - standard net_device_stats
* - some other counters used for debug and driver performance
* evaluation -baz
*/
struct lmc_statistics
{
unsigned long rx_packets; /* total packets received */
unsigned long tx_packets; /* total packets transmitted */
unsigned long rx_bytes;
unsigned long tx_bytes;
unsigned long rx_errors; /* bad packets received */
unsigned long tx_errors; /* packet transmit problems */
unsigned long rx_dropped; /* no space in linux buffers */
unsigned long tx_dropped; /* no space available in linux */
unsigned long multicast; /* multicast packets received */
unsigned long collisions;
/* detailed rx_errors: */
unsigned long rx_length_errors;
unsigned long rx_over_errors; /* receiver ring buff overflow */
unsigned long rx_crc_errors; /* recved pkt with crc error */
unsigned long rx_frame_errors; /* recv'd frame alignment error */
unsigned long rx_fifo_errors; /* recv'r fifo overrun */
unsigned long rx_missed_errors; /* receiver missed packet */
/* detailed tx_errors */
unsigned long tx_aborted_errors;
unsigned long tx_carrier_errors;
unsigned long tx_fifo_errors;
unsigned long tx_heartbeat_errors;
unsigned long tx_window_errors;
/* for cslip etc */
unsigned long rx_compressed;
unsigned long tx_compressed;
/* -------------------------------------
* Custom stats & counters follow -baz */
u_int32_t version_size;
u_int32_t lmc_cardtype;
u_int32_t tx_ProcTimeout;
u_int32_t tx_IntTimeout;
u_int32_t tx_NoCompleteCnt;
u_int32_t tx_MaxXmtsB4Int;
u_int32_t tx_TimeoutCnt;
u_int32_t tx_OutOfSyncPtr;
u_int32_t tx_tbusy0;
u_int32_t tx_tbusy1;
u_int32_t tx_tbusy_calls;
u_int32_t resetCount;
u_int32_t lmc_txfull;
u_int32_t tbusy;
u_int32_t dirtyTx;
u_int32_t lmc_next_tx;
u_int32_t otherTypeCnt;
u_int32_t lastType;
u_int32_t lastTypeOK;
u_int32_t txLoopCnt;
u_int32_t usedXmtDescripCnt;
u_int32_t txIndexCnt;
u_int32_t rxIntLoopCnt;
u_int32_t rx_SmallPktCnt;
u_int32_t rx_BadPktSurgeCnt;
u_int32_t rx_BuffAllocErr;
u_int32_t tx_lossOfClockCnt;
/* T1 error counters */
u_int32_t framingBitErrorCount;
u_int32_t lineCodeViolationCount;
u_int32_t lossOfFrameCount;
u_int32_t changeOfFrameAlignmentCount;
u_int32_t severelyErroredFrameCount;
u_int32_t check;
};
typedef struct lmc_xinfo {
u_int32_t Magic0; /* BEEFCAFE */
u_int32_t PciCardType;
u_int32_t PciSlotNumber; /* PCI slot number */
u_int16_t DriverMajorVersion;
u_int16_t DriverMinorVersion
|