path: root/drivers/net/phy/dp83640.c

/*
 * Driver for the National Semiconductor DP83640 PHYTER
 *
 * Copyright (C) 2010 OMICRON electronics GmbH
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
#include <linux/ethtool.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/mii.h>
#include <linux/module.h>
#include <linux/net_tstamp.h>
#include <linux/netdevice.h>
#include <linux/phy.h>
#include <linux/ptp_classify.h>
#include <linux/ptp_clock_kernel.h>

#include "dp83640_reg.h"

#define DP83640_PHY_ID	0x20005ce1
#define PAGESEL		0x13
#define LAYER4		0x02
#define LAYER2		0x01
#define MAX_RXTS	64
#define N_EXT_TS	1
#define PSF_PTPVER	2
#define PSF_EVNT	0x4000
#define PSF_RX		0x2000
#define PSF_TX		0x1000
#define EXT_EVENT	1
#define EXT_GPIO	1
#define CAL_EVENT	2
#define CAL_GPIO	9
#define CAL_TRIGGER	2

/* phyter seems to miss the mark by 16 ns */
#define ADJTIME_FIX	16

#if defined(__BIG_ENDIAN)
#define ENDIAN_FLAG	0
#elif defined(__LITTLE_ENDIAN)
#define ENDIAN_FLAG	PSF_ENDIAN
#endif

#define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)->cb))

struct phy_rxts {
	u16 ns_lo;   /* ns[15:0] */
	u16 ns_hi;   /* overflow[1:0], ns[29:16] */
	u16 sec_lo;  /* sec[15:0] */
	u16 sec_hi;  /* sec[31:16] */
	u16 seqid;   /* sequenceId[15:0] */
	u16 msgtype; /* messageType[3:0], hash[11:0] */
};

struct phy_txts {
	u16 ns_lo;   /* ns[15:0] */
	u16 ns_hi;   /* overflow[1:0], ns[29:16] */
	u16 sec_lo;  /* sec[15:0] */
	u16 sec_hi;  /* sec[31:16] */
};

struct rxts {
	struct list_head list;
	unsigned long tmo;
	u64 ns;
	u16 seqid;
	u8  msgtype;
	u16 hash;
};

struct dp83640_clock;

struct dp83640_private {
	struct list_head list;
	struct dp83640_clock *clock;
	struct phy_device *phydev;
	struct work_struct ts_work;
	int hwts_tx_en;
	int hwts_rx_en;
	int layer;
	int version;
	/* remember state of cfg0 during calibration */
	int cfg0;
	/* remember the last event time stamp */
	struct phy_txts edata;
	/* list of rx timestamps */
	struct list_head rxts;
	struct list_head rxpool;
	struct rxts rx_pool_data[MAX_RXTS];
	/* protects above three fields from concurrent access */
	spinlock_t rx_lock;
	/* queues of incoming and outgoing packets */
	struct sk_buff_head rx_queue;
	struct sk_buff_head tx_queue;
};

struct dp83640_clock {
	/* keeps the instance in the 'phyter_clocks' list */
	struct list_head list;
	/* we create one clock instance per MII bus */
	struct mii_bus *bus;
	/* protects extended registers from concurrent access */
	struct mutex extreg_lock;
	/* remembers which page was last selected */
	int page;
	/* our advertised capabilities */
	struct ptp_clock_info caps;
	/* protects the three fields below from concurrent access */
	struct mutex clock_lock;
	/* the one phyter from which we shall read */
	struct dp83640_private *chosen;
	/* list of the other attached phyters, not chosen */
	struct list_head phylist;
	/* reference to our PTP hardware clock */
	struct ptp_clock *ptp_clock;
};

/* globals */

static int chosen_phy = -1;
static ushort cal_gpio = 4;

module_param(chosen_phy, int, 0444);
module_param(cal_gpio, ushort, 0444);

MODULE_PARM_DESC(chosen_phy, \
	"The address of the PHY to use for the ancillary clock features");
MODULE_PARM_DESC(cal_gpio, \
	"Which GPIO line to use for synchronizing multiple PHYs");

/* a list of clocks and a mutex to protect it */
static LIST_HEAD(phyter_clocks);
static DEFINE_MUTEX(phyter_clocks_lock);

static void rx_timestamp_work(struct work_struct *work);

/* extended register access functions */

#define BROADCAST_ADDR 31

static inline int broadcast_write(struct mii_bus *bus, u32 regnum, u16 val)
{
	return mdiobus_write(bus, BROADCAST_ADDR, regnum, val);
}

/* Caller must hold extreg_lock. */
static int ext_read(struct phy_device *phydev, int page, u32 regnum)
{
	struct dp83640_private *dp83640 = phydev->priv;
	int val;

	if (dp83640->clock->page != page) {
		broadcast_write(phydev->bus, PAGESEL, page);
		dp83640->clock->page =