/*
* HDIC HD29L2 DMB-TH demodulator driver
*
* Copyright (C) 2011 Metropolia University of Applied Sciences, Electria R&D
*
* Author: Antti Palosaari <crope@iki.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "hd29l2_priv.h"
int hd29l2_debug;
module_param_named(debug, hd29l2_debug, int, 0644);
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
/* write multiple registers */
static int hd29l2_wr_regs(struct hd29l2_priv *priv, u8 reg, u8 *val, int len)
{
int ret;
u8 buf[2+len];
struct i2c_msg msg[1] = {
{
.addr = priv->cfg.i2c_addr,
.flags = 0,
.len = sizeof(buf),
.buf = buf,
}
};
buf[0] = 0x00;
buf[1] = reg;
memcpy(&buf[2], val, len);
ret = i2c_transfer(priv->i2c, msg, 1);
if (ret == 1) {
ret = 0;
} else {
warn("i2c wr failed=%d reg=%02x len=%d", ret, reg, len);
ret = -EREMOTEIO;
}
return ret;
}
/* read multiple registers */
static int hd29l2_rd_regs(struct hd29l2_priv *priv, u8 reg, u8 *val, int len)
{
int ret;
u8 buf[2] = { 0x00, reg };
struct i2c_msg msg[2] = {
{
.addr = priv->cfg.i2c_addr,
.flags = 0,
.len = 2,
.buf = buf,
}, {
.addr = priv->cfg.i2c_addr,
.flags = I2C_M_RD,
.len = len,
.buf = val,
}
};
ret = i2c_transfer(priv->i2c, msg, 2);
if (ret == 2) {
ret = 0;
} else {
warn("i2c rd failed=%d reg=%02x len=%d", ret, reg, len);
ret = -EREMOTEIO;
}
return ret;
}
/* write single register */
static int hd29l2_wr_reg(struct hd29l2_priv *priv, u8 reg, u8 val)
{
return hd29l2_wr_regs(priv, reg, &val, 1);
}
/* read single register */
static int hd29l2_rd_reg(struct hd29l2_priv *priv, u8 reg, u8 *val)
{
return hd29l2_rd_regs(priv, reg, val, 1);
}
/* write single register with mask */
static int hd29l2_wr_reg_mask(struct hd29l2_priv *priv, u8 reg, u8 val, u8 mask)
{
int ret;
u8 tmp;
/* no need for read if whole reg is written */
if (mask != 0xff) {
ret = hd29l2_rd_regs(priv, reg, &tmp, 1);
if (ret)
return ret;
val &= mask;
tmp &= ~mask;
val |= tmp;
}
return hd29l2_wr_regs(priv, reg, &val, 1);
}
/* read single register with mask */
int hd29l2_rd_reg_mask(struct hd29l2_priv *priv, u8 reg, u8 *val, u8 mask)
{
int ret, i;
u8 tmp;
ret = hd29l2_rd_regs(priv, reg, &tmp, 1);
if (ret)
return ret;
tmp &= mask;
/* find position of the first bit */
for (i = 0; i < 8; i++) {
if ((mask >> i) & 0x01)
break;
}
*val = tmp >> i;
return 0;
}
static int hd29l2_soft_reset(struct hd29l2_priv *priv)
{
int ret;
u8 tmp;
ret = hd29l2_rd_reg(priv, 0x26, &tmp);
if (ret)
goto err;
ret = hd29l2_wr_reg(priv, 0x26, 0x0d);
if (ret)
goto err;
usleep_range(10000, 20000);
ret = hd29l2_wr_reg(priv, 0x26, tmp);
if (ret)
goto err;
return 0;
err:
dbg("%s: failed=%d", __func__, ret);
return ret;
}
static int hd29l2_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
{
int ret, i;
struct hd29l2_priv *priv = fe->demodulator_priv;
u8 tmp;
dbg("%s: enable=%d", __func__, enable);
/* set tuner address for demod */
if (!