path: root/drivers/infiniband/hw/nes/nes_hw.h

/*
* Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses.  You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
*     Redistribution and use in source and binary forms, with or
*     without modification, are permitted provided that the following
*     conditions are met:
*
*      - Redistributions of source code must retain the above
*        copyright notice, this list of conditions and the following
*        disclaimer.
*
*      - Redistributions in binary form must reproduce the above
*        copyright notice, this list of conditions and the following
*        disclaimer in the documentation and/or other materials
*        provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/

#ifndef __NES_HW_H
#define __NES_HW_H

#include <linux/inet_lro.h>

#define NES_PHY_TYPE_1G        2
#define NES_PHY_TYPE_IRIS      3
#define NES_PHY_TYPE_ARGUS     4
#define NES_PHY_TYPE_PUMA_1G   5
#define NES_PHY_TYPE_PUMA_10G  6
#define NES_PHY_TYPE_GLADIUS   7

#define NES_MULTICAST_PF_MAX 8

enum pci_regs {
	NES_INT_STAT = 0x0000,
	NES_INT_MASK = 0x0004,
	NES_INT_PENDING = 0x0008,
	NES_INTF_INT_STAT = 0x000C,
	NES_INTF_INT_MASK = 0x0010,
	NES_TIMER_STAT = 0x0014,
	NES_PERIODIC_CONTROL = 0x0018,
	NES_ONE_SHOT_CONTROL = 0x001C,
	NES_EEPROM_COMMAND = 0x0020,
	NES_EEPROM_DATA = 0x0024,
	NES_FLASH_COMMAND = 0x0028,
	NES_FLASH_DATA  = 0x002C,
	NES_SOFTWARE_RESET = 0x0030,
	NES_CQ_ACK = 0x0034,
	NES_WQE_ALLOC = 0x0040,
	NES_CQE_ALLOC = 0x0044,
};

enum indexed_regs {
	NES_IDX_CREATE_CQP_LOW = 0x0000,
	NES_IDX_CREATE_CQP_HIGH = 0x0004,
	NES_IDX_QP_CONTROL = 0x0040,
	NES_IDX_FLM_CONTROL = 0x0080,
	NES_IDX_INT_CPU_STATUS = 0x00a0,
	NES_IDX_GPIO_CONTROL = 0x00f0,
	NES_IDX_GPIO_DATA = 0x00f4,
	NES_IDX_TCP_CONFIG0 = 0x01e4,
	NES_IDX_TCP_TIMER_CONFIG = 0x01ec,
	NES_IDX_TCP_NOW = 0x01f0,
	NES_IDX_QP_MAX_CFG_SIZES = 0x0200,
	NES_IDX_QP_CTX_SIZE = 0x0218,
	NES_IDX_TCP_TIMER_SIZE0 = 0x0238,
	NES_IDX_TCP_TIMER_SIZE1 = 0x0240,
	NES_IDX_ARP_CACHE_SIZE = 0x0258,
	NES_IDX_CQ_CTX_SIZE = 0x0260,
	NES_IDX_MRT_SIZE = 0x0278,
	NES_IDX_PBL_REGION_SIZE = 0x0280,
	NES_IDX_IRRQ_COUNT = 0x02b0,
	NES_IDX_RX_WINDOW_BUFFER_PAGE_TABLE_SIZE = 0x02f0,
	NES_IDX_RX_WINDOW_BUFFER_SIZE = 0x0300,
	NES_IDX_DST_IP_ADDR = 0x0400,
	NES_IDX_PCIX_DIAG = 0x08e8,
	NES_IDX_MPP_DEBUG = 0x0a00,
	NES_IDX_PORT_RX_DISCARDS = 0x0a30,
	NES_IDX_PORT_TX_DISCARDS = 0x0a34,
	NES_IDX_MPP_LB_DEBUG = 0x0b00,
	NES_IDX_DENALI_CTL_22 = 0x1058,
	NES_IDX_MAC_TX_CONTROL = 0x2000,
	NES_IDX_MAC_TX_CONFIG = 0x2004,
	NES_IDX_MAC_TX_PAUSE_QUANTA = 0x2008,
	NES_IDX_MAC_RX_CONTROL = 0x200c,
	NES_IDX_MAC_RX_CONFIG = 0x2010,
	NES_IDX_MAC_EXACT_MATCH_BOTTOM = 0x201c,
	NES_IDX_MAC_MDIO_CONTROL = 0x2084,
	NES_IDX_MAC_TX_OCTETS_LOW = 0x2100,
	NES_IDX_MAC_TX_OCTETS_HIGH = 0x2104,
	NES_IDX_MAC_TX_FRAMES_LOW = 0x2108,
	NES_IDX_MAC_TX_FRAMES_HIGH = 0x210c,
	NES_IDX_MAC_TX_PAUSE_FRAMES = 0x2118,
	NES_IDX_MAC_TX_ERRORS = 0x2138,
	NES_IDX_MAC_RX_OCTETS_LOW = 0x213c,
	NES_IDX_MAC_RX_OCTETS_HIGH = 0x2140,
	NES_IDX_MAC_RX_FRAMES_LOW = <