/****************************************************************************** Device driver for Interphase ATM PCI adapter cards Author: Peter Wang <pwang@iphase.com> Interphase Corporation <www.iphase.com> Version: 1.0 iphase.h: This is the header file for iphase.c. ******************************************************************************* This software may be used and distributed according to the terms of the GNU General Public License (GPL), incorporated herein by reference. Drivers based on this skeleton fall under the GPL and must retain the authorship (implicit copyright) notice. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. Modified from an incomplete driver for Interphase 5575 1KVC 1M card which was originally written by Monalisa Agrawal at UNH. Now this driver supports a variety of varients of Interphase ATM PCI (i)Chip adapter card family (See www.iphase.com/products/ClassSheet.cfm?ClassID=ATM) in terms of PHY type, the size of control memory and the size of packet memory. The followings are the change log and history: Bugfix the Mona's UBR driver. Modify the basic memory allocation and dma logic. Port the driver to the latest kernel from 2.0.46. Complete the ABR logic of the driver, and added the ABR work- around for the hardware anormalies. Add the CBR support. Add the flow control logic to the driver to allow rate-limit VC. Add 4K VC support to the board with 512K control memory. Add the support of all the variants of the Interphase ATM PCI (i)Chip adapter cards including x575 (155M OC3 and UTP155), x525 (25M UTP25) and x531 (DS3 and E3). Add SMP support. Support and updates available at: ftp://ftp.iphase.com/pub/atm*******************************************************************************/#ifndef IPHASE_H #define IPHASE_H #include<linux/config.h>/************************ IADBG DEFINE *********************************//* IADebugFlag Bit Map */#define IF_IADBG_INIT_ADAPTER 0x00000001 // init adapter info#define IF_IADBG_TX 0x00000002 // debug TX#define IF_IADBG_RX 0x00000004 // debug RX#define IF_IADBG_QUERY_INFO 0x00000008 // debug Request call#define IF_IADBG_SHUTDOWN 0x00000010 // debug shutdown event#define IF_IADBG_INTR 0x00000020 // debug interrupt DPC#define IF_IADBG_TXPKT 0x00000040 // debug TX PKT#define IF_IADBG_RXPKT 0x00000080 // debug RX PKT#define IF_IADBG_ERR 0x00000100 // debug system error#define IF_IADBG_EVENT 0x00000200 // debug event#define IF_IADBG_DIS_INTR 0x00001000 // debug disable interrupt#define IF_IADBG_EN_INTR 0x00002000 // debug enable interrupt#define IF_IADBG_LOUD 0x00004000 // debugging info#define IF_IADBG_VERY_LOUD 0x00008000 // excessive debugging info#define IF_IADBG_CBR 0x00100000 //#define IF_IADBG_UBR 0x00200000 //#define IF_IADBG_ABR 0x00400000 //#define IF_IADBG_DESC 0x01000000 //#define IF_IADBG_SUNI_STAT 0x02000000 // suni statistics#define IF_IADBG_RESET 0x04000000 #define IF_IADBG(f) if (IADebugFlag & (f))#ifdef CONFIG_ATM_IA_DEBUG /* Debug build */#define IF_LOUD(A)
