path: root/arch/powerpc/boot/dts/mpc8572ds.dts

/*
 * MPC8572 DS Device Tree Source
 *
 * Copyright 2007-2009 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/dts-v1/;
/ {
	model = "fsl,MPC8572DS";
	compatible = "fsl,MPC8572DS";
	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		ethernet2 = &enet2;
		ethernet3 = &enet3;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
		pci1 = &pci1;
		pci2 = &pci2;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8572@0 {
			device_type = "cpu";
			reg = <0x0>;
			d-cache-line-size = <32>;	// 32 bytes
			i-cache-line-size = <32>;	// 32 bytes
			d-cache-size = <0x8000>;		// L1, 32K
			i-cache-size = <0x8000>;		// L1, 32K
			timebase-frequency = <0>;
			bus-frequency = <0>;
			clock-frequency = <0>;
			next-level-cache = <&L2>;
		};

		PowerPC,8572@1 {
			device_type = "cpu";
			reg = <0x1>;
			d-cache-line-size = <32>;	// 32 bytes
			i-cache-line-size = <32>;	// 32 bytes
			d-cache-size = <0x8000>;		// L1, 32K
			i-cache-size = <0x8000>;		// L1, 32K
			timebase-frequency = <0>;
			bus-frequency = <0>;
			clock-frequency = <0>;
			next-level-cache = <&L2>;
		};
	};

	memory {
		device_type = "memory";
	};

	localbus@ffe05000 {
		#address-cells = <2>;
		#size-cells = <1>;
		compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
		reg = <0 0xffe05000 0 0x1000>;
		interrupts = <19 2>;
		interrupt-parent = <&mpic>;

		ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
			  0x1 0x0 0x0 0xe0000000 0x08000000
			  0x2 0x0 0x0 0xffa00000 0x00040000
			  0x3 0x0 0x0 0xffdf0000 0x00008000
			  0x4 0x0 0x0 0xffa40000 0x00040000
			  0x5 0x0 0x0 0xffa80000 0x00040000
			  0x6 0x0 0x0 0xffac0000 0x00040000>;

		nor@0,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "cfi-flash";
			reg = <0x0 0x0 0x8000000>;
			bank-width = <2>;
			device-width = <1>;

			ramdisk@0 {
				reg = <0x0 0x03000000>;
				read-only;
			};

			diagnostic@3000000 {
				reg = <0x03000000 0x00e00000>;
				read-only;
			};

			dink@3e00000 {
				reg = <0x03e00000 0x00200000>;
				read-only;
			};

			kernel@4000000 {
				reg = <0x04000000 0x00400000>;
				read-only;
			};

			jffs2@4400000 {
				reg = <0x04400000 0x03b00000>;
			};

			dtb@7f00000 {
				reg = <0x07f00000 0x00080000>;
				read-only;
			};

			u-boot@7f80000 {
				reg = <0x07f80000 0x00080000>;
				read-only;
			};
		};

		nand@2,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8572-fcm-nand",
				     "fsl,elbc-fcm-nand";
			reg = <0x2 0x0 0x40000>;

			u-boot@0 {
				reg = <0x0 0x02000000>;
				read-only;
			};

			jffs2@2000000 {
				reg = <0x02000000 0x10000000>;
			};

			ramdisk@12000000 {
				reg = <0x12000000 0x08000000>;
				read-only;
			};

			kernel@1a000000 {
				reg = <0x1a000000 0x04000000>;
			};

			dtb@1e000000 {
				reg = <0x1e000000 0x01000000>;
				read-only;
			};

			empty@1f000000 {
				reg = <0x1f000000 0x21000000>;
			};
		};

		nand@4,0 {
			compatible = "fsl,mpc8572-fcm-nand",
				     "fsl,elbc-fcm-nand";
			reg = <0x4 0x0 0x40000>;
		};

		nand@5,0 {
			compatible = "fsl,mpc8572-fcm-nand",
				     "fsl,elbc-fcm-nand";
			reg = <0x5 0x0 0x40000>;
		};

		nand@6,0 {
			compatible = "fsl,mpc8572-fcm-nand",
				     "fsl,elbc-fcm-nand";
			reg = <0x6 0x0 0x40000>;
		};
	};

	soc8572@ffe00000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "simple-bus";
		ranges = <0x0 0 0xffe00000 0x100000>;
		bus-frequency = <0