path: root/arch/mn10300/mm/misalignment.c

/* MN10300 Misalignment fixup handler
 *
 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
 * Written by David Howells (dhowells@redhat.com)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public Licence
 * as published by the Free Software Foundation; either version
 * 2 of the Licence, or (at your option) any later version.
 */
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/ptrace.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/atomic.h>
#include <asm/smp.h>
#include <asm/pgalloc.h>
#include <asm/cpu-regs.h>
#include <asm/busctl-regs.h>
#include <asm/fpu.h>
#include <asm/gdb-stub.h>
#include <asm/asm-offsets.h>

#if 0
#define kdebug(FMT, ...) printk(KERN_DEBUG "MISALIGN: "FMT"\n", ##__VA_ARGS__)
#else
#define kdebug(FMT, ...) do {} while (0)
#endif

static int misalignment_addr(unsigned long *registers, unsigned long sp,
			     unsigned params, unsigned opcode,
			     unsigned long disp,
			     void **_address, unsigned long **_postinc,
			     unsigned long *_inc);

static int misalignment_reg(unsigned long *registers, unsigned params,
			    unsigned opcode, unsigned long disp,
			    unsigned long **_register);

static void misalignment_MOV_Lcc(struct pt_regs *regs, uint32_t opcode);

static const unsigned Dreg_index[] = {
	REG_D0 >> 2, REG_D1 >> 2, REG_D2 >> 2, REG_D3 >> 2
};

static const unsigned Areg_index[] = {
	REG_A0 >> 2, REG_A1 >> 2, REG_A2 >> 2, REG_A3 >> 2
};

static const unsigned Rreg_index[] = {
	REG_E0 >> 2, REG_E1 >> 2, REG_E2 >> 2, REG_E3 >> 2,
	REG_E4 >> 2, REG_E5 >> 2, REG_E6 >> 2, REG_E7 >> 2,
	REG_A0 >> 2, REG_A1 >> 2, REG_A2 >> 2, REG_A3 >> 2,
	REG_D0 >> 2, REG_D1 >> 2, REG_D2 >> 2, REG_D3 >> 2
};

enum format_id {
	FMT_S0,
	FMT_S1,
	FMT_S2,
	FMT_S4,
	FMT_D0,
	FMT_D1,
	FMT_D2,
	FMT_D4,
	FMT_D6,
	FMT_D7,
	FMT_D8,
	FMT_D9,
	FMT_D10,
};

static const struct {
	u_int8_t opsz, dispsz;
} format_tbl[16] = {
	[FMT_S0]	= { 8,	0	},
	[FMT_S1]	= { 8,	8	},
	[FMT_S2]	= { 8,	16	},
	[FMT_S4]	= { 8,	32	},
	[FMT_D0]	= { 16,	0	},
	[FMT_D1]	= { 16,	8	},
	[FMT_D2]	= { 16,	16	},
	[FMT_D4]	= { 16,	32	},
	[FMT_D6]	= { 24,	0	},
	[FMT_D7]	= { 24,	8	},
	[FMT_D8]	= { 24,	24	},
	[FMT_D9]	= { 24,	32	},
	[FMT_D10]	= { 32,	0	},
};

enum value_id {
	DM0,		/* data reg in opcode in bits 0-1 */
	DM1,		/* data reg in opcode in bits 2-3 */
	DM2,		/* data reg in opcode in bits 4-5 */
	AM0,		/* addr reg in opcode in bits 0-1 */
	AM1,		/* addr reg in opcode in bits 2-3 */
	AM2,		/* addr reg in opcode in bits 4-5 */
	RM0,		/* reg in opcode in bits 0-3 */
	RM1,		/* reg in opcode in bits 2-5 */
	RM2,		/* reg in opcode in bits 4-7 */
	RM4,		/* reg in opcode in bits 8-11 */
	RM6,		/* reg in opcode in bits 12-15 */

	RD0,		/* reg in displacement in bits 0-3 */
	RD2,		/* reg in displacement in bits 4-7 */

	SP,		/* stack pointer */

	SD8,		/* 8-bit signed displacement */
	SD16,		/* 16-bit signed displacement */
	SD24,		/* 24-bit signed displacement */
	SIMM4_2,	/* 4-bit signed displacement in opcode bits 4-7 */
	SIMM8,		/* 8-bit signed immediate */
	IMM8,		/* 8-bit unsigned immediate */
	IMM16,		/* 16-bit unsigned immediate */
	IMM24,		/* 24-bit unsigned immediate */
	IMM32,		/* 32-bit unsigned immediate */
	IMM32_HIGH8,	/* 32-bit unsigned immediate, LSB in opcode */

	IMM32_MEM,	/* 32-bit unsigned displacement */
	IMM32_HIGH8_MEM, /* 32-bit unsigned displacement, LSB in opcode */

	DN0	= DM0,
	DN1	= DM1,
	DN2	= DM2,
	AN0	= AM0,
	AN1	= AM1,
	AN2	= AM2,