/*
* arch/ia64/kvm/vmm_ivt.S
*
* Copyright (C) 1998-2001, 2003 Hewlett-Packard Co
* Stephane Eranian <eranian@hpl.hp.com>
* David Mosberger <davidm@hpl.hp.com>
* Copyright (C) 2000, 2002-2003 Intel Co
* Asit Mallick <asit.k.mallick@intel.com>
* Suresh Siddha <suresh.b.siddha@intel.com>
* Kenneth Chen <kenneth.w.chen@intel.com>
* Fenghua Yu <fenghua.yu@intel.com>
*
*
* 00/08/23 Asit Mallick <asit.k.mallick@intel.com> TLB handling
* for SMP
* 00/12/20 David Mosberger-Tang <davidm@hpl.hp.com> DTLB/ITLB
* handler now uses virtual PT.
*
* 07/6/20 Xuefei Xu (Anthony Xu) (anthony.xu@intel.com)
* Supporting Intel virtualization architecture
*
*/
/*
* This file defines the interruption vector table used by the CPU.
* It does not include one entry per possible cause of interruption.
*
* The first 20 entries of the table contain 64 bundles each while the
* remaining 48 entries contain only 16 bundles each.
*
* The 64 bundles are used to allow inlining the whole handler for
* critical
* interruptions like TLB misses.
*
* For each entry, the comment is as follows:
*
* // 0x1c00 Entry 7 (size 64 bundles) Data Key Miss
* (12,51)
* entry offset ----/ / / /
* /
* entry number ---------/ / /
* /
* size of the entry -------------/ /
* /
* vector name -------------------------------------/
* /
* interruptions triggering this vector
* ----------------------/
*
* The table is 32KB in size and must be aligned on 32KB
* boundary.
* (The CPU ignores the 15 lower bits of the address)
*
* Table is based upon EAS2.6 (Oct 1999)
*/
#include <asm/asmmacro.h>
#include <asm/cache.h>
#include <asm/pgtable.h>
#include "asm-offsets.h"
#include "vcpu.h"
#include "kvm_minstate.h"
#include "vti.h"
#if 1
# define PSR_DEFAULT_BITS psr.ac
#else
# define PSR_DEFAULT_BITS 0
#endif
#define KVM_FAULT(n) \
kvm_fault_##n:; \
mov r19=n;; \
br.sptk.many kvm_vmm_panic; \
;; \
#define KVM_REFLECT(n) \
mov r31=pr; \
mov r19=n; /* prepare to save predicates */ \
mov r29=cr.ipsr; \
;; \
tbit.z p6,p7=r29,IA64_PSR_VM_BIT; \
(p7) br.sptk.many kvm_dispatch_reflection; \
br.sptk.many kvm_vmm_panic; \
GLOBAL_ENTRY(kvm_vmm_panic)
KVM_SAVE_MIN_WITH_COVER_R19
alloc r14=ar.pfs,0,0,1,0
mov out0=r15
adds r3=8,r2 // set up second base pointer
;;
ssm psr.ic
;;
srlz.i // guarantee that interruption collection is on
;;
(p15) ssm psr.i // restore psr.
addl r14=@gprel(ia64_leave_hypervisor),gp
;;
KVM_SAVE_REST
mov rp=r14
;;
br.call.sptk.many b6=vmm_panic_handler;
END(kvm_vmm_panic)
.section .text.ivt,"ax"
.align 32768 