path: root/arch/ia64/kvm/trampoline.S

/* Save all processor states
 *
 * Copyright (c) 2007 Fleming Feng <fleming.feng@intel.com>
 * Copyright (c) 2007 Anthony Xu   <anthony.xu@intel.com>
 */

#include <asm/asmmacro.h>
#include "asm-offsets.h"


#define CTX(name)    VMM_CTX_##name##_OFFSET

	/*
	 *	r32:		context_t base address
	 */
#define	SAVE_BRANCH_REGS			\
	add	r2 = CTX(B0),r32;		\
	add	r3 = CTX(B1),r32;		\
	mov	r16 = b0;			\
	mov	r17 = b1;			\
	;;					\
	st8	[r2]=r16,16;			\
	st8	[r3]=r17,16;			\
	;;					\
	mov	r16 = b2;			\
	mov	r17 = b3;			\
	;;					\
	st8	[r2]=r16,16;			\
	st8	[r3]=r17,16;			\
	;;					\
	mov	r16 = b4;			\
	mov	r17 = b5;			\
	;;					\
	st8	[r2]=r16;   			\
	st8	[r3]=r17;   			\
	;;

	/*
	 *	r33:		context_t base address
	 */
#define	RESTORE_BRANCH_REGS			\
	add	r2 = CTX(B0),r33;		\
	add	r3 = CTX(B1),r33;		\
	;;					\
	ld8	r16=[r2],16;			\
	ld8	r17=[r3],16;			\
	;;					\
	mov	b0 = r16;			\
	mov	b1 = r17;			\
	;;					\
	ld8	r16=[r2],16;			\
	ld8	r17=[r3],16;			\
	;;					\
	mov	b2 = r16;			\
	mov	b3 = r17;			\
	;;					\
	ld8	r16=[r2];   			\
	ld8	r17=[r3];   			\
	;;					\
	mov	b4=r16;				\
	mov	b5=r17;				\
	;;


	/*
	 *	r32: context_t base address
	 *	bsw == 1
	 *	Save all bank1 general registers, r4 ~ r7
	 */
#define	SAVE_GENERAL_REGS			\
	add	r2=CTX(R4),r32;			\
	add	r3=CTX(R5),r32;			\
	;;					\
.mem.offset 0,0;        			\
	st8.spill	[r2]=r4,16;		\
.mem.offset 8,0;        			\
	st8.spill	[r3]=r5,16;		\
	;;					\
.mem.offset 0,0;        			\
	st8.spill	[r2]=r6,48;		\
.mem.offset 8,0;        			\
	st8.spill	[r3]=r7,48;		\
	;;                          		\
.mem.offset 0,0;        			\
    st8.spill    [r2]=r12;			\
.mem.offset 8,0;				\
    st8.spill    [r3]=r13;			\
    ;;

	/*
	 *	r33: context_t base address
	 *	bsw == 1
	 */
#define	RESTORE_GENERAL_REGS			\
	add	r2=CTX(R4),r33;			\
	add	r3=CTX(R5),r33;			\
	;;					\
	ld8.fill	r4=[r2],16;		\
	ld8.fill	r5=[r3],16;		\
	;;					\
	ld8.fill	r6=[r2],48;		\
	ld8.fill	r7=[r3],48;		\
	;;					\
	ld8.fill    r12=[r2];			\
	ld8.fill    r13 =[r3];			\
	;;




	/*
	 *	r32:		context_t base address
	 */
#define	SAVE_KERNEL_REGS			\
	add	r2 = CTX(KR0),r32;		\
	add	r3 = CTX(KR1),r32;		\
	mov	r16 = ar.k0;			\
	mov	r17 = ar.k1;			\
	;;		        		\
	st8	[r2] = r16,16;			\
	st8	[r3] = r17,16;			\
	;;		        		\
	mov	r16 = ar.k2;			\
	mov	r17 = ar.k3;			\
	;;		        		\
	st8	[r2] = r16,16;			\
	st8	[r3] = r17,16;			\
	;;					\
	mov	r16 = ar.k4;			\
	mov	r17 = ar.k5;			\
	;;				    	\
	st8	[r2] = r16,16;			\
	st8	[r3] = r17,16;			\
	;;					\
	mov	r16 = ar.k6;			\
	mov	r17 = ar.k7;			\
	;;		    			\
	st8	[r2] = r16;     		\
	st8	[r3] = r17;			\
	;;



	/*
	 *	r33:		context_t base address
	 */
#define	RESTORE_KERNEL_REGS			\
	add	r2 = CTX(KR0),r33;		\
	add	r3 = CTX(KR1),r33;		\
	;;