path: root/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi

/*
 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
 */
/include/ "skeleton.dtsi"

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	memory {
		reg = <0x00000000 0x04000000>,
		    <0x08000000 0x04000000>;
	};

	L2: l2-cache {
		compatible = "arm,l210-cache";
		reg = <0x10210000 0x1000>;
		interrupt-parent = <&vica>;
		interrupts = <30>;
		cache-unified;
		cache-level = <2>;
	};

	mtu0: mtu@101e2000 {
		/* Nomadik system timer */
		compatible = "st,nomadik-mtu";
		reg = <0x101e2000 0x1000>;
		interrupt-parent = <&vica>;
		interrupts = <4>;
		clocks = <&timclk>, <&pclk>;
		clock-names = "timclk", "apb_pclk";
	};

	mtu1: mtu@101e3000 {
		/* Secondary timer */
		reg = <0x101e3000 0x1000>;
		interrupt-parent = <&vica>;
		interrupts = <5>;
		clocks = <&timclk>, <&pclk>;
		clock-names = "timclk", "apb_pclk";
	};

	gpio0: gpio@101e4000 {
		compatible = "st,nomadik-gpio";
		reg =  <0x101e4000 0x80>;
		interrupt-parent = <&vica>;
		interrupts = <6>;
		interrupt-controller;
		#interrupt-cells = <2>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-bank = <0>;
		clocks = <&pclk>;
	};

	gpio1: gpio@101e5000 {
		compatible = "st,nomadik-gpio";
		reg =  <0x101e5000 0x80>;
		interrupt-parent = <&vica>;
		interrupts = <7>;
		interrupt-controller;
		#interrupt-cells = <2>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-bank = <1>;
		clocks = <&pclk>;
	};

	gpio2: gpio@101e6000 {
		compatible = "st,nomadik-gpio";
		reg =  <0x101e6000 0x80>;
		interrupt-parent = <&vica>;
		interrupts = <8>;
		interrupt-controller;
		#interrupt-cells = <2>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-bank = <2>;
		clocks = <&pclk>;
	};

	gpio3: gpio@101e7000 {
		compatible = "st,nomadik-gpio";
		reg =  <0x101e7000 0x80>;
		interrupt-parent = <&vica>;
		interrupts = <9>;
		interrupt-controller;
		#interrupt-cells = <2>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-bank = <3>;
		clocks = <&pclk>;
	};

	pinctrl {
		compatible = "stericsson,stn8815-pinctrl";
		/* Pin configurations */
		uart0 {
			uart0_default_mux: uart0_mux {
				u0_default_mux {
					ste,function = "u0";
					ste,pins = "u0_a_1";
				};
			};
		};
		uart1 {
			uart1_default_mux: uart1_mux {
				u1_default_mux {
					ste,function = "u1";
					ste,pins = "u1_a_1";
				};
			};
		};
		mmcsd {
			mmcsd_default_mux: mmcsd_mux {
				mmcsd_default_mux {
					ste,function = "mmcsd";
					ste,pins = "mmcsd_a_1";
				};
			};
			mmcsd_default_mode: mmcsd_default {
				mmcsd_default_cfg1 {
					/* MCCLK */
					ste,pins = "GPIO8_B10";
					ste,output = <0>;
				};
				mmcsd_default_cfg2 {
					/* MCCMDDIR, MCDAT0DIR, MCDAT31DIR */
					ste,pins = "GPIO10_C11", "GPIO15_A12",
					"GPIO16_C13";
					ste,output = <1>;
				};
				mmcsd_default_cfg3 {
					/* MCCMD, MCDAT3-0, MCMSFBCLK */
					ste,pins = "GPIO9_A10", "GPIO11_B11",
					"GPIO12_A11", "GPIO13_C12",
					"GPIO14_B12", "GPIO24_C15";
					ste,input = <1>;
				};
			};
		};
		i2c0 {
			i2c0_default_mux: i2c0_mux {
				i2c0_default_mux {
					ste,function = "i2c0";
					ste,pins = "i2c0_a_1";
				};
			};
			i2c0_default_mode: i2c0_default {
				i2c0_default_cfg {
					ste,pins = "GPIO62_D3", "GPIO63_D2";
					ste,input = <0>;
				};
			};
		};
		i2c1 {
			i2c1_default_mux: i2c1_mux {
				i2c1_default_mux {
					ste,function = "i2c1";
					ste,pins = "i2c1_a_1";
				};
			};
			i2c1_default_mode: i2c1_default {
				i2c1_default_cfg {
					ste,pins = "GPIO53_L4", "GPIO54_L3";
					ste,input = <0>;
				};
			};
		};
		i2c2 {
			i2c2_default_mode: i2c2_default {
				</