aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/r8a7740.dtsi
blob: 44d3d520e01ffd0cce0c48527889d2ddf8e4c230 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
/*
 * Device Tree Source for the r8a7740 SoC
 *
 * Copyright (C) 2012 Renesas Solutions Corp.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/include/ "skeleton.dtsi"

/ {
	compatible = "renesas,r8a7740";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0x0>;
		};
	};

	gic: interrupt-controller@c2800000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		#address-cells = <1>;
		interrupt-controller;
		reg = <0xc2800000 0x1000>,
		      <0xc2000000 0x1000>;
	};

	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <0 83 4>;
	};

	/* irqpin0: IRQ0 - IRQ7 */
	irqpin0: irqpin@e6900000 {
		compatible = "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe6900000 4>,
			<0xe6900010 4>,
			<0xe6900020 1>,
			<0xe6900040 1>,
			<0xe6900060 1>;
		interrupt-parent = <&gic>;
		interrupts = <0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4>;
	};

	/* irqpin1: IRQ8 - IRQ15 */
	irqpin1: irqpin@e6900004 {
		compatible = "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe6900004 4>,
			<0xe6900014 4>,
			<0xe6900024 1>,
			<0xe6900044 1>,
			<0xe6900064 1>;
		interrupt-parent = <&gic>;
		interrupts = <0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4>;
	};

	/* irqpin2: IRQ16 - IRQ23 */
	irqpin2: irqpin@e6900008 {
		compatible = "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe6900008 4>,
			<0xe6900018 4>,
			<0xe6900028 1>,
			<0xe6900048 1>,
			<0xe6900068 1>;
		interrupt-parent = <&gic>;
		interrupts = <0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4>;
	};

	/* irqpin3: IRQ24 - IRQ31 */
	irqpin3: irqpin@e690000c {
		compatible = "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe690000c 4>,
			<0xe690001c 4>,
			<0xe690002c 1>,
			<0xe690004c 1>,
			<0xe690006c 1>;
		interrupt-parent = <&gic>;
		interrupts = <0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4>;
	};

	i2c0: i2c@fff20000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xfff20000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 201 0x4
			      0 202 0x4
			      0 203 0x4
			      0 204 0x4>;
	};

	i2c1: i2c@e6c20000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xe6c20000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 70 0x4
			      0 71 0x4
			      0 72 0x4
			      0 73 0x4>;
	};

	pfc: pfc@e6050000 {
		compatible = "renesas,pfc-r8a7740";
		reg = <0xe6050000 0x8000>,
		      <0xe605800c 0x20>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	tpu: pwm@e6600000 {
		compatible = "renesas,tpu-r8a7740", "renesas,tpu";
		reg = <0xe6600000 0x100>;
		status = "disabled";
		#pwm-cells = <3>;
	};
};