aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/orion5x.dtsi
blob: 892c64e3f1e1dd697d08f2c58bf6377f05104c2d (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
/*
 * Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Marvell Orion5x SoC";
	compatible = "marvell,orion5x";
	interrupt-parent = <&intc>;

	aliases {
		gpio0 = &gpio0;
	};
	intc: interrupt-controller {
		compatible = "marvell,orion-intc", "marvell,intc";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0xf1020204 0x04>;
	};

	ocp@f1000000 {
		compatible = "simple-bus";
		ranges = <0x00000000 0xf1000000 0x4000000
		          0xf2200000 0xf2200000 0x0000800>;
		#address-cells = <1>;
		#size-cells = <1>;

		gpio0: gpio@10100 {
			compatible = "marvell,orion-gpio";
			#gpio-cells = <2>;
			gpio-controller;
			reg = <0x10100 0x40>;
			ngpios = <32>;
			interrupt-controller;
			#interrupt-cells = <2>;
			interrupts = <6>, <7>, <8>, <9>;
		};

		serial@12000 {
			compatible = "ns16550a";
			reg = <0x12000 0x100>;
			reg-shift = <2>;
			interrupts = <3>;
			/* set clock-frequency in board dts */
			status = "disabled";
		};

		serial@12100 {
			compatible = "ns16550a";
			reg = <0x12100 0x100>;
			reg-shift = <2>;
			interrupts = <4>;
			/* set clock-frequency in board dts */
			status = "disabled";
		};

		spi@10600 {
			compatible = "marvell,orion-spi";
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			reg = <0x10600 0x28>;
			status = "disabled";
		};

		wdt@20300 {
			compatible = "marvell,orion-wdt";
			reg = <0x20300 0x28>;
			status = "okay";
		};

		ehci@50000 {
			compatible = "marvell,orion-ehci";
			reg = <0x50000 0x1000>;
			interrupts = <17>;
			status = "disabled";
		};

		ehci@a0000 {
			compatible = "marvell,orion-ehci";
			reg = <0xa0000 0x1000>;
			interrupts = <12>;
			status = "disabled";
		};

		sata@80000 {
			compatible = "marvell,orion-sata";
			reg = <0x80000 0x5000>;
			interrupts = <29>;
			status = "disabled";
		};

		i2c@11000 {
			compatible = "marvell,mv64xxx-i2c";
			reg = <0x11000 0x20>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <5>;
			clock-frequency = <100000>;
			status = "disabled";
		};

		xor@60900 {
			compatible = "marvell,orion-xor";
			reg = <0x60900 0x100
			       0x60b00 0x100>;
			status = "okay";

			xor00 {
			      interrupts = <30>;
			      dmacap,memcpy;
			      dmacap,xor;
			};
			xor01 {
			      interrupts = <31>;
			      dmacap,memcpy;
			      dmacap,xor;
			      dmacap,memset;
			};
		};

		crypto@90000 {
			compatible = "marvell,orion-crypto";
			reg = <0x90000 0x10000>,
			      <0xf2200000 0x800>;
			reg-names = "regs", "sram";
			interrupts = <28>;
			status = "okay";
		};
	};
};