path: root/arch/arm/boot/dts/keystone-clocks.dtsi

/*
 * Device Tree Source for Keystone 2 clock tree
 *
 * Copyright (C) 2013 Texas Instruments, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

clocks {
	#address-cells = <1>;
	#size-cells = <1>;
	ranges;

	mainpllclk: mainpllclk@2310110 {
		#clock-cells = <0>;
		compatible = "ti,keystone,main-pll-clock";
		clocks = <&refclksys>;
		reg = <0x02620350 4>, <0x02310110 4>;
		reg-names = "control", "multiplier";
		fixed-postdiv = <2>;
	};

	papllclk: papllclk@2620358 {
		#clock-cells = <0>;
		compatible = "ti,keystone,pll-clock";
		clocks = <&refclkpass>;
		clock-output-names = "pa-pll-clk";
		reg = <0x02620358 4>;
		reg-names = "control";
	};

	ddr3apllclk: ddr3apllclk@2620360 {
		#clock-cells = <0>;
		compatible = "ti,keystone,pll-clock";
		clocks = <&refclkddr3a>;
		clock-output-names = "ddr-3a-pll-clk";
		reg = <0x02620360 4>;
		reg-names = "control";
	};

	ddr3bpllclk: ddr3bpllclk@2620368 {
		#clock-cells = <0>;
		compatible = "ti,keystone,pll-clock";
		clocks = <&refclkddr3b>;
		clock-output-names = "ddr-3b-pll-clk";
		reg = <0x02620368 4>;
		reg-names = "control";
	};

	armpllclk: armpllclk@2620370 {
		#clock-cells = <0>;
		compatible = "ti,keystone,pll-clock";
		clocks = <&refclkarm>;
		clock-output-names = "arm-pll-clk";
		reg = <0x02620370 4>;
		reg-names = "control";
	};

	mainmuxclk: mainmuxclk@2310108 {
		#clock-cells = <0>;
		compatible = "ti,keystone,pll-mux-clock";
		clocks = <&mainpllclk>, <&refclksys>;
		reg = <0x02310108 4>;
		bit-shift = <23>;
		bit-mask = <1>;
		clock-output-names = "mainmuxclk";
	};

	chipclk1: chipclk1 {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&mainmuxclk>;
		clock-div = <1>;
		clock-mult = <1>;
		clock-output-names = "chipclk1";
	};

	chipclk1rstiso: chipclk1rstiso {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&mainmuxclk>;
		clock-div = <1>;
		clock-mult = <1>;
		clock-output-names = "chipclk1rstiso";
	};

	gemtraceclk: gemtraceclk@2310120 {
		#clock-cells = <0>;
		compatible = "ti,keystone,pll-divider-clock";
		clocks = <&mainmuxclk>;
		reg = <0x02310120 4>;
		bit-shift = <0>;
		bit-mask = <8>;
		clock-output-names = "gemtraceclk";
	};

	chipstmxptclk: chipstmxptclk {
		#clock-cells = <0>;
		compatible = "ti,keystone,pll-divider-clock";
		clocks = <&mainmuxclk>;
		reg = <0x02310164 4>;
		bit-shift = <0>;
		bit-mask = <8>;
		clock-output-names = "chipstmxptclk";
	};

	chipclk12: chipclk12 {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&chipclk1>;
		clock-div = <2>;
		clock-mult = <1>;
		clock-output-names = "chipclk12";
	};

	chipclk13: chipclk13 {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&chipclk1>;
		clock-div = <3>;
		clock-mult = <1>;
		clock-output-names = "chipclk13";
	};

	paclk13: paclk13 {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&papllclk>;
		clock-div = <3>;
		clock-mult = <1>;
		clock-output-names = "paclk13";
	};

	chipclk14: chipclk14 {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&chipclk1>;
		clock-div = <4>;
		clock-mult = <1>;
		clock-output-names = "chipclk14";
	};

	chipclk16: chipclk16 {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&chipclk1>;
		clock-div = <6>;
		clock-mult = <1>;
		clock-output-names = "chipclk16";
	};

	chipclk112: chipclk112 {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&chipclk1>;
		clock-div = <12>;
		clock-mult = <1>;