aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
blob: d16066608e21ae3716bc52a58597dc51f6ed9241 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
/*
 * Copyright (C) 2013,2014 Russell King
 *
 * This describes the hookup for an AR8035 to the iMX6 on the SolidRun
 * MicroSOM.
 */
&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
	phy-mode = "rgmii";
	phy-reset-duration = <2>;
	phy-reset-gpios = <&gpio4 15 0>;
	status = "okay";
};

&iomuxc {
	enet {
		pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				/* AR8035 reset */
				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x130b0
				/* AR8035 interrupt */
				MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x80000000
				/* GPIO16 -> AR8035 25MHz */
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0xc0000000
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x80000000
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
				/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x0a0b1
				/* AR8035 pin strapping: IO voltage: pull up */
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				/* AR8035 pin strapping: PHYADDR#0: pull down */
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x13030
				/* AR8035 pin strapping: PHYADDR#1: pull down */
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030
				/* AR8035 pin strapping: MODE#1: pull up */
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				/* AR8035 pin strapping: MODE#3: pull up */
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				/* AR8035 pin strapping: MODE#0: pull down */
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030

				/*
				 * As the RMII pins are also connected to RGMII
				 * so that an AR8030 can be placed, set these
				 * to high-z with the same pulls as above.
				 * Use the GPIO settings to avoid changing the
				 * input select registers.
				 */
				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x03000
				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x03000
				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x03000
			>;
		};
	};
};