path: root/arch/arm/boot/dts/imx28.dtsi

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/include/ "skeleton.dtsi"

/ {
	interrupt-parent = <&icoll>;

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
		saif0 = &saif0;
		saif1 = &saif1;
		serial0 = &auart0;
		serial1 = &auart1;
		serial2 = &auart2;
		serial3 = &auart3;
		serial4 = &auart4;
		ethernet0 = &mac0;
		ethernet1 = &mac1;
	};

	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x3c900>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx28-icoll", "fsl,icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			hsadc@80002000 {
				reg = <0x80002000 0x2000>;
				interrupts = <13 87>;
				status = "disabled";
			};

			dma-apbh@80004000 {
				compatible = "fsl,imx28-dma-apbh";
				reg = <0x80004000 0x2000>;
				clocks = <&clks 25>;
			};

			perfmon@80006000 {
				reg = <0x80006000 0x800>;
				interrupts = <27>;
				status = "disabled";
			};

			gpmi-nand@8000c000 {
				compatible = "fsl,imx28-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
				reg-names = "gpmi-nand", "bch";
				interrupts = <88>, <41>;
				interrupt-names = "gpmi-dma", "bch";
				clocks = <&clks 50>;
				clock-names = "gpmi_io";
				fsl,gpmi-dma-channel = <4>;
				status = "disabled";
			};

			ssp0: ssp@80010000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x80010000 0x2000>;
				interrupts = <96 82>;
				clocks = <&clks 46>;
				fsl,ssp-dma-channel = <0>;
				status = "disabled";
			};

			ssp1: ssp@80012000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x80012000 0x2000>;
				interrupts = <97 83>;
				clocks = <&clks 47>;
				fsl,ssp-dma-channel = <1>;
				status = "disabled";
			};

			ssp2: ssp@80014000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x80014000 0x2000>;
				interrupts = <98 84>;
				clocks = <&clks 48>;
				fsl,ssp-dma-channel = <2>;
				status = "disabled";
			};

			ssp3: ssp@80016000 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x80016000 0x2000>;
				interrupts = <99 85>;
				clocks = <&clks 49>;
				fsl,ssp-dma-channel = <3>;
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-pinctrl", "simple-bus";
				reg = <0x80018000 0x2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <127>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells =