Booting the Linux/ppc kernel without Open Firmware
--------------------------------------------------
(c) 2005 Benjamin Herrenschmidt <benh at kernel.crashing.org>,
IBM Corp.
(c) 2005 Becky Bruce <becky.bruce at freescale.com>,
Freescale Semiconductor, FSL SOC and 32-bit additions
(c) 2006 MontaVista Software, Inc.
Flash chip node definition
Table of Contents
=================
I - Introduction
1) Entry point for arch/powerpc
2) Board support
II - The DT block format
1) Header
2) Device tree generalities
3) Device tree "structure" block
4) Device tree "strings" block
III - Required content of the device tree
1) Note about cells and address representation
2) Note about "compatible" properties
3) Note about "name" properties
4) Note about node and property names and character set
5) Required nodes and properties
a) The root node
b) The /cpus node
c) The /cpus/* nodes
d) the /memory node(s)
e) The /chosen node
f) the /soc<SOCname> node
IV - "dtc", the device tree compiler
V - Recommendations for a bootloader
VI - System-on-a-chip devices and nodes
1) Defining child nodes of an SOC
2) Representing devices without a current OF specification
a) PHY nodes
b) Interrupt controllers
c) 4xx/Axon EMAC ethernet nodes
d) Xilinx IP cores
e) USB EHCI controllers
f) MDIO on GPIOs
g) SPI busses
VII - Marvell Discovery mv64[345]6x System Controller chips
1) The /system-controller node
2) Child nodes of /system-controller
a) Marvell Discovery MDIO bus
b) Marvell Discovery ethernet controller
c) Marvell Discovery PHY nodes
d) Marvell Discovery SDMA nodes
e) Marvell Discovery BRG nodes
f) Marvell Discovery CUNIT nodes
g) Marvell Discovery MPSCROUTING nodes
h) Marvell Discovery MPSCINTR nodes
i) Marvell Discovery MPSC nodes
j) Marvell Discovery Watch Dog Timer nodes
k) Marvell Discovery I2C nodes
l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes
n) Marvell Discovery GPP (General Purpose Pins) nodes
o) Marvell Discovery PCI host bridge node
p) Marvell Discovery CPU Error nodes
q) Marvell Discovery SRAM Controller nodes
r) Marvell Discovery PCI Error Handler nodes
s) Marvell Discovery Memory Controller nodes
VIII - Specifying interrupt information for devices
1) interrupts property
2) interrupt-parent property
3) OpenPIC Interrupt Controllers
4) ISA Interrupt Controllers
IX - Specifying GPIO information for devices
1) gpios property
2) gpio-controller nodes
X - Specifying device power management information (sleep property)
Appendix A - Sample SOC node for MPC8540
Revision Information
====================
May 18, 2005: Rev 0.1 - Initial draft, no chapter III yet.
May 19, 2005: Rev 0.2 - Add chapter III and bits & pieces here or
clarifies the fact that a lot of things are
optional, the kernel only requires a very
small device tree, though it is encouraged
to provide an as complete one as possible.
May 24, 2005: Rev 0.3 - Precise that DT block has to be in RAM
- Misc fixes
- Define version 3 and new format version 16
for the DT block (version 16 needs kernel
patches, will be fwd separately).
String block now has a size, and full path
is replaced by unit name for more
compactness.
linux,phandle is made optional, only nodes
that are referenced by other nodes need it.
"name" property is now automatically
deduced from the unit name
June 1, 2005: Rev 0.4 - Correct confusion between OF_DT_END and
OF_DT_END_NODE in structure definition.
- Change version 16 format to always align
property data to 4 bytes. Since tokens are
already aligned, that means no specific
required alignment between property size
and property data. The old style variable
alignment would make it impossible to do
"simple" insertion of properties using
memmove (thanks Milton for
noticing). Updated kernel patch as well
- Correct a few more alignment constraints
- Add a chapter about the device-tree
compiler and the textural representation of
the tree that can be "compiled" by dtc.
November 21, 2005: Rev 0.5
- Additions/generalizations for 32-bit
- Changed to reflect the new arch/powerpc
structure
- Added chapter VI
ToDo:
- Add some definitions of interrupt tree (simple/complex)
- Add some definitions for PCI host bridges
- Add some common address format examples
- Add definitions for standard properties and "compatible"
names for cells that are not already defined by the existing
OF spec.
- Compare FSL SOC use of PCI to standard and make sure no new