From 136d47d3e1cc455e9e1d9cb7b9d513a8581d3835 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 15 Apr 2006 11:16:19 +0200 Subject: [MIPS] Wire up tee(2). Signed-off-by: Ralf Baechle --- include/asm-mips/unistd.h | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h index 8bb0bb9b2e6..809f9f55bac 100644 --- a/include/asm-mips/unistd.h +++ b/include/asm-mips/unistd.h @@ -326,16 +326,17 @@ #define __NR_unshare (__NR_Linux + 303) #define __NR_splice (__NR_Linux + 304) #define __NR_sync_file_range (__NR_Linux + 305) +#define __NR_tee (__NR_Linux + 306) /* * Offset of the last Linux o32 flavoured syscall */ -#define __NR_Linux_syscalls 305 +#define __NR_Linux_syscalls 306 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ #define __NR_O32_Linux 4000 -#define __NR_O32_Linux_syscalls 305 +#define __NR_O32_Linux_syscalls 306 #if _MIPS_SIM == _MIPS_SIM_ABI64 @@ -608,16 +609,17 @@ #define __NR_unshare (__NR_Linux + 262) #define __NR_splice (__NR_Linux + 263) #define __NR_sync_file_range (__NR_Linux + 264) +#define __NR_tee (__NR_Linux + 265) /* * Offset of the last Linux 64-bit flavoured syscall */ -#define __NR_Linux_syscalls 264 +#define __NR_Linux_syscalls 265 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ #define __NR_64_Linux 5000 -#define __NR_64_Linux_syscalls 264 +#define __NR_64_Linux_syscalls 265 #if _MIPS_SIM == _MIPS_SIM_NABI32 @@ -894,16 +896,17 @@ #define __NR_unshare (__NR_Linux + 266) #define __NR_splice (__NR_Linux + 267) #define __NR_sync_file_range (__NR_Linux + 268) +#define __NR_tee (__NR_Linux + 269) /* * Offset of the last N32 flavoured syscall */ -#define __NR_Linux_syscalls 268 +#define __NR_Linux_syscalls 269 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ #define __NR_N32_Linux 6000 -#define __NR_N32_Linux_syscalls 268 +#define __NR_N32_Linux_syscalls 269 #ifdef __KERNEL__ -- cgit v1.2.3-18-g5258 From b4ab24e1c8c1442b2928bab1325b56bdbbcf898e Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 3 Jun 2006 22:30:58 +0100 Subject: [MIPS] Define ARCH_HAS_IRQ_PER_CPU for all SMP systems. Without SMTC on non-Malta will blow up. Signed-off-by: Ralf Baechle --- include/asm-mips/irq.h | 4 ++++ include/asm-mips/mach-mips/irq.h | 6 ------ 2 files changed, 4 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h index d35c61776a0..896550bad32 100644 --- a/include/asm-mips/irq.h +++ b/include/asm-mips/irq.h @@ -76,4 +76,8 @@ extern int setup_irq_smtc(unsigned int irq, struct irqaction * new, unsigned long hwmask); #endif /* CONFIG_MIPS_MT_SMTC */ +#ifdef CONFIG_SMP +#define ARCH_HAS_IRQ_PER_CPU +#endif + #endif /* _ASM_IRQ_H */ diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-mips/irq.h index 083d9c512a0..e994b0c0122 100644 --- a/include/asm-mips/mach-mips/irq.h +++ b/include/asm-mips/mach-mips/irq.h @@ -4,10 +4,4 @@ #define NR_IRQS 256 -#ifdef CONFIG_SMP - -#define ARCH_HAS_IRQ_PER_CPU - -#endif - #endif /* __ASM_MACH_MIPS_IRQ_H */ -- cgit v1.2.3-18-g5258 From 4277ff5ee55694f67d9c6586bb4c06991e221a68 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 3 Jun 2006 22:40:15 +0100 Subject: [MIPS] Fix use of ehb instruction for non-R2 configurations. Signed-off-by: Ralf Baechle --- include/asm-mips/asmmacro.h | 4 ++-- include/asm-mips/mipsregs.h | 3 ++- include/asm-mips/stackframe.h | 16 ++++++++-------- 3 files changed, 12 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h index 2c42f6b00a4..92e62ef711e 100644 --- a/include/asm-mips/asmmacro.h +++ b/include/asm-mips/asmmacro.h @@ -26,14 +26,14 @@ ori \reg, \reg, TCSTATUS_IXMT xori \reg, \reg, TCSTATUS_IXMT mtc0 \reg, CP0_TCSTATUS - ehb + _ehb .endm .macro local_irq_disable reg=t0 mfc0 \reg, CP0_TCSTATUS ori \reg, \reg, TCSTATUS_IXMT mtc0 \reg, CP0_TCSTATUS - ehb + _ehb .endm #else .macro local_irq_enable reg=t0 diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 673977901ed..9192d76c133 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -1459,7 +1459,8 @@ static inline void __emt(unsigned int previous) static inline void __ehb(void) { __asm__ __volatile__( - " ehb \n"); + " .set mips32r2 \n" + " ehb \n" " .set mips0 \n"); } /* diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h index 513aa513383..158a4cd12e4 100644 --- a/include/asm-mips/stackframe.h +++ b/include/asm-mips/stackframe.h @@ -304,7 +304,7 @@ mfc0 v0, CP0_TCSTATUS ori v0, TCSTATUS_IXMT mtc0 v0, CP0_TCSTATUS - ehb + _ehb DMT 5 # dmt a1 jal mips_ihb #endif /* CONFIG_MIPS_MT_SMTC */ @@ -325,14 +325,14 @@ * restore TCStatus.IXMT. */ LONG_L v1, PT_TCSTATUS(sp) - ehb + _ehb mfc0 v0, CP0_TCSTATUS andi v1, TCSTATUS_IXMT /* We know that TCStatua.IXMT should be set from above */ xori v0, v0, TCSTATUS_IXMT or v0, v0, v1 mtc0 v0, CP0_TCSTATUS - ehb + _ehb andi a1, a1, VPECONTROL_TE beqz a1, 1f emt @@ -411,7 +411,7 @@ /* Clear TKSU, leave IXMT */ xori t0, 0x00001800 mtc0 t0, CP0_TCSTATUS - ehb + _ehb /* We need to leave the global IE bit set, but clear EXL...*/ mfc0 t0, CP0_STATUS ori t0, ST0_EXL | ST0_ERL @@ -438,7 +438,7 @@ * and enable interrupts only for the * current TC, using the TCStatus register. */ - ehb + _ehb mfc0 t0,CP0_TCSTATUS /* Fortunately CU 0 is in the same place in both registers */ /* Set TCU0, TKSU (for later inversion) and IXMT */ @@ -447,7 +447,7 @@ /* Clear TKSU *and* IXMT */ xori t0, 0x00001c00 mtc0 t0, CP0_TCSTATUS - ehb + _ehb /* We need to leave the global IE bit set, but clear EXL...*/ mfc0 t0, CP0_STATUS ori t0, ST0_EXL @@ -479,7 +479,7 @@ andi v1, v0, TCSTATUS_IXMT ori v0, TCSTATUS_IXMT mtc0 v0, CP0_TCSTATUS - ehb + _ehb DMT 2 # dmt v0 /* * We don't know a priori if ra is "live" @@ -495,7 +495,7 @@ xori t0, 0x1e mtc0 t0, CP0_STATUS #ifdef CONFIG_MIPS_MT_SMTC - ehb + _ehb andi v0, v0, VPECONTROL_TE beqz v0, 2f nop /* delay slot */ -- cgit v1.2.3-18-g5258 From 7ae7cdab97f33d6a5d42664b411be52b46572e5b Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 29 Jun 2006 21:10:50 +0100 Subject: elf-em.h: Define and explain both EM_MIPS_RS3_LE and EM_MIPS_RS4_BE. They have been obsoleted by the ELF header EI_CLASS and EI_DATA fields in combination with e_flags. Afaics EM_MIPS_RS3_LE and EM_MIPS_RS4_BE never had any practical relevance. Binutils will not produce such binaries and the kernel will not accept them as MIPS binaries. Signed-off-by: Ralf Baechle --- include/linux/elf-em.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/linux/elf-em.h b/include/linux/elf-em.h index 114a96d2565..6a5796c81c9 100644 --- a/include/linux/elf-em.h +++ b/include/linux/elf-em.h @@ -11,7 +11,12 @@ #define EM_486 6 /* Perhaps disused */ #define EM_860 7 #define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */ + /* Next two are historical and binaries and + modules of these types will be rejected by + Linux. */ +#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian */ #define EM_MIPS_RS4_BE 10 /* MIPS R4000 big-endian */ + #define EM_PARISC 15 /* HPPA */ #define EM_SPARC32PLUS 18 /* Sun's "v8plus" */ #define EM_PPC 20 /* PowerPC */ -- cgit v1.2.3-18-g5258 From f41ae0b2b9e5b4455cfc68dcc885f4fa2a973384 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 5 Jun 2006 17:24:46 +0100 Subject: [MIPS] Fix configuration of R2 CPU features and multithreading. Signed-off-by: Ralf Baechle --- include/asm-mips/cpu-features.h | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h index 881ce1f9803..44285a9d552 100644 --- a/include/asm-mips/cpu-features.h +++ b/include/asm-mips/cpu-features.h @@ -187,19 +187,15 @@ # endif #endif -#ifdef CONFIG_CPU_MIPSR2 -# if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint) -# define cpu_has_vint (cpu_data[0].options & MIPS_CPU_VINT) -# else -# define cpu_has_vint 0 -# endif -# if defined(CONFIG_CPU_MIPSR2_IRQ_EI) && !defined(cpu_has_veic) -# define cpu_has_veic (cpu_data[0].options & MIPS_CPU_VEIC) -# else -# define cpu_has_veic 0 -# endif -#else +#if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint) +# define cpu_has_vint (cpu_data[0].options & MIPS_CPU_VINT) +#elif !defined(cpu_has_vint) # define cpu_has_vint 0 +#endif + +#if defined(CONFIG_CPU_MIPSR2_IRQ_EI) && !defined(cpu_has_veic) +# define cpu_has_veic (cpu_data[0].options & MIPS_CPU_VEIC) +#elif !defined(cpu_has_veic) # define cpu_has_veic 0 #endif -- cgit v1.2.3-18-g5258 From f7a849153be3b66326b52dce0d07896b56cb4cd7 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 20 Jun 2006 23:59:11 +0900 Subject: [MIPS] Fix FIXADDR_TOP for TX39/TX49. FIXADDR_TOP is used for HIGHMEM and for upper limit of vmalloc area on 32bit kernel. TX39XX and TX49XX have "reserved" segment in CKSEG3 area. 0xff000000-0xff3fffff on TX49XX and 0xff000000-0xfffeffff on TX39XX are reserved (unmapped, uncached) therefore can not be used as mapped area. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/fixmap.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-mips/fixmap.h b/include/asm-mips/fixmap.h index 1cadefbbc03..6959bdb5931 100644 --- a/include/asm-mips/fixmap.h +++ b/include/asm-mips/fixmap.h @@ -69,7 +69,11 @@ extern void __set_fixmap (enum fixed_addresses idx, * the start of the fixmap, and leave one page empty * at the top of mem.. */ +#if defined(CONFIG_CPU_TX39XX) || defined(CONFIG_CPU_TX49XX) +#define FIXADDR_TOP (0xff000000UL - 0x2000) +#else #define FIXADDR_TOP (0xffffe000UL) +#endif #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) -- cgit v1.2.3-18-g5258 From 38e9156147e5b0defb71a3eb7e9eff74609c496a Mon Sep 17 00:00:00 2001 From: Domen Puncer Date: Fri, 23 Jun 2006 11:58:31 +0200 Subject: [MIPS] au1xxx: fix PSC_SMBTXRX_RSR. Signed-off-by: Domen Puncer Signed-off-by: Ralf Baechle --- include/asm-mips/mach-au1x00/au1xxx_psc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-mips/mach-au1x00/au1xxx_psc.h b/include/asm-mips/mach-au1x00/au1xxx_psc.h index d7cbacdd21f..1bd4e27caf6 100644 --- a/include/asm-mips/mach-au1x00/au1xxx_psc.h +++ b/include/asm-mips/mach-au1x00/au1xxx_psc.h @@ -512,7 +512,7 @@ typedef struct psc_smb { /* Transmit register control. */ -#define PSC_SMBTXRX_RSR (1 << 30) +#define PSC_SMBTXRX_RSR (1 << 28) #define PSC_SMBTXRX_STP (1 << 29) #define PSC_SMBTXRX_DATAMASK (0xff) -- cgit v1.2.3-18-g5258 From 89e22d15910a47fe026fe607710ec4646efc100a Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 27 Jun 2006 17:34:35 +0100 Subject: [MIPS] ioc3.h: Uses u8, so include . Signed-off-by: Ralf Baechle --- include/asm-mips/sn/ioc3.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-mips/sn/ioc3.h b/include/asm-mips/sn/ioc3.h index f7d530f306f..099677774d7 100644 --- a/include/asm-mips/sn/ioc3.h +++ b/include/asm-mips/sn/ioc3.h @@ -5,6 +5,8 @@ #ifndef _IOC3_H #define _IOC3_H +#include + /* SUPERIO uart register map */ typedef volatile struct ioc3_uartregs { union { -- cgit v1.2.3-18-g5258 From fc103349bb7d3f011ffe9678da86a35634f4b6fc Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 28 Jun 2006 11:24:12 +0100 Subject: [MIPS] Remove BSD and Sys V compat data types. Signed-off-by: Ralf Baechle --- include/asm-mips/sn/klconfig.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/asm-mips/sn/klconfig.h b/include/asm-mips/sn/klconfig.h index 52238e65af8..b63cd0655b3 100644 --- a/include/asm-mips/sn/klconfig.h +++ b/include/asm-mips/sn/klconfig.h @@ -602,7 +602,7 @@ typedef struct klcpu_s { /* CPU */ typedef struct klhub_s { /* HUB */ klinfo_t hub_info; - uint hub_flags; /* PCFG_HUB_xxx flags */ + unsigned int hub_flags; /* PCFG_HUB_xxx flags */ klport_t hub_port; /* hub is connected to this */ nic_t hub_box_nic; /* nic of containing box */ klconf_off_t hub_mfg_nic; /* MFG NIC string */ @@ -611,7 +611,7 @@ typedef struct klhub_s { /* HUB */ typedef struct klhub_uart_s { /* HUB */ klinfo_t hubuart_info; - uint hubuart_flags; /* PCFG_HUB_xxx flags */ + unsigned int hubuart_flags; /* PCFG_HUB_xxx flags */ nic_t hubuart_box_nic; /* nic of containing box */ } klhub_uart_t ; @@ -710,7 +710,7 @@ typedef struct klvmed_s { /* VME DEVICE - VME BOARD */ /* XXX - Don't we need the number of ports here?!? */ typedef struct klrou_s { /* ROUTER */ klinfo_t rou_info ; - uint rou_flags ; /* PCFG_ROUTER_xxx flags */ + unsigned int rou_flags ; /* PCFG_ROUTER_xxx flags */ nic_t rou_box_nic ; /* nic of the containing module */ klport_t rou_port[MAX_ROUTER_PORTS + 1] ; /* array index 1 to 6 */ klconf_off_t rou_mfg_nic ; /* MFG NIC string */ @@ -733,8 +733,8 @@ typedef struct klgfx_s { /* GRAPHICS Device */ klinfo_t gfx_info; klconf_off_t old_gndevs; /* for compatibility with older proms */ klconf_off_t old_gdoff0; /* for compatibility with older proms */ - uint cookie; /* for compatibility with older proms */ - uint moduleslot; + unsigned int cookie; /* for compatibility with older proms */ + unsigned int moduleslot; struct klgfx_s *gfx_next_pipe; graphics_t gfx_specific; klconf_off_t pad0; /* for compatibility with older proms */ -- cgit v1.2.3-18-g5258 From 8db089c6b5594c961fb6bc6d613b9926e0d3d98f Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 29 Jun 2006 20:06:53 +0100 Subject: [MIPS] Add missing backslashes to macro definitions. Signed-off-by: Ralf Baechle --- include/asm-mips/hazards.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index 66943c451c1..25f5e8a4177 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -69,10 +69,10 @@ * Use a macro for ehb unless explicit support for MIPSR2 is enabled */ -#define irq_enable_hazard +#define irq_enable_hazard \ _ehb -#define irq_disable_hazard +#define irq_disable_hazard \ _ehb #elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) -- cgit v1.2.3-18-g5258