From ff772b27e5f65c1a186e9f0741f0d00ef7002799 Mon Sep 17 00:00:00 2001
From: Jay Cliburn <jacliburn@bellsouth.net>
Date: Fri, 9 May 2008 22:12:06 -0500
Subject: atl1: add PHY power save mode
Using vendor-provided magic, add code to enter power save mode
on the PHY. We'll need this for suspend and wake-on-lan.
Signed-off-by: Jay Cliburn <jacliburn@bellsouth.net>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
---
drivers/net/atlx/atl1.c | 19 ++++++++-----------
drivers/net/atlx/atlx.h | 3 +++
2 files changed, 11 insertions(+), 11 deletions(-)
(limited to 'drivers')
diff --git a/drivers/net/atlx/atl1.c b/drivers/net/atlx/atl1.c
index 0afe522b8f7..3beb44e80ba 100644
--- a/drivers/net/atlx/atl1.c
+++ b/drivers/net/atlx/atl1.c
@@ -638,21 +638,18 @@ static s32 atl1_phy_leave_power_saving(struct atl1_hw *hw)
}
/*
- *TODO: do something or get rid of this
+ * Force the PHY into power saving mode using vendor magic.
*/
#ifdef CONFIG_PM
-static s32 atl1_phy_enter_power_saving(struct atl1_hw *hw)
+static void atl1_phy_enter_power_saving(struct atl1_hw *hw)
{
-/* s32 ret_val;
- * u16 phy_data;
- */
+ atl1_write_phy_reg(hw, MII_DBG_ADDR, 0);
+ atl1_write_phy_reg(hw, MII_DBG_DATA, 0x124E);
+ atl1_write_phy_reg(hw, MII_DBG_ADDR, 2);
+ atl1_write_phy_reg(hw, MII_DBG_DATA, 0x3000);
+ atl1_write_phy_reg(hw, MII_DBG_ADDR, 3);
+ atl1_write_phy_reg(hw, MII_DBG_DATA, 0);
-/*
- ret_val = atl1_write_phy_reg(hw, ...);
- ret_val = atl1_write_phy_reg(hw, ...);
- ....
-*/
- return 0;
}
#endif
diff --git a/drivers/net/atlx/atlx.h b/drivers/net/atlx/atlx.h
index 3be7c09734d..96721881ad6 100644
--- a/drivers/net/atlx/atlx.h
+++ b/drivers/net/atlx/atlx.h
@@ -460,6 +460,9 @@ MODULE_VERSION(ATLX_DRIVER_VERSION);
#define MII_ATLX_PSSR_100MBS 0x4000 /* 01=100Mbs */
#define MII_ATLX_PSSR_1000MBS 0x8000 /* 10=1000Mbs */
+#define MII_DBG_ADDR 0x1D
+#define MII_DBG_DATA 0x1E
+
/* PCI Command Register Bit Definitions */
#define PCI_REG_COMMAND 0x04 /* PCI Command Register */
#define CMD_IO_SPACE 0x0001
--
cgit v1.2.3-18-g5258