From dcef0d06b34a80071da4496556e85f9bf3b3c0bf Mon Sep 17 00:00:00 2001 From: Yinghai Lu Date: Fri, 10 Feb 2012 15:33:46 -0800 Subject: PCI: Disable cardbus bridge MEM1 prefetchable bit Some BIOSes enable prefetch on both MEM0 and MEM1. But the cardbus code assumes MEM1 is non-pref... Discussion could be found at: https://lkml.org/lkml/2012/1/12/1 https://bugzilla.kernel.org/show_bug.cgi?id=41622#c23 Signed-off-by: Yinghai Lu Tested-by: Dominik Brodowski Signed-off-by: Jesse Barnes --- drivers/pci/setup-bus.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/pci') diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 090217afb4e..d5897c32f66 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -914,6 +914,14 @@ static void pci_bus_size_cardbus(struct pci_bus *bus, if (realloc_head) add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size, 0 /* dont care */); + /* MEM1 must not be pref mmio */ + pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); + if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) { + ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1; + pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl); + pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); + } + /* * Check whether prefetchable memory is supported * by this bridge. -- cgit v1.2.3-18-g5258