From 91bdf0d0c48c9254fb73037bfb8ee1777093225b Mon Sep 17 00:00:00 2001 From: Javi Merino Date: Tue, 19 Feb 2013 13:52:22 +0000 Subject: irqchip: fix typo when moving gic_raise_softirq() In b1cffebf (ARM: GIC: remove direct use of gic_raise_softirq) gic_raise_softirq() was moved inside arch/arm/common/gic.c but in the process it reverted by mistake a change to that function made by 384a290 (ARM: gic: use a private mapping for CPU target interfaces). This breaks multicluster systems on ARM. This patch fixes the typo. Signed-off-by: Javi Merino Acked-by: Rob Herring Signed-off-by: Olof Johansson --- drivers/irqchip/irq-gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/irqchip') diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 644d7246842..a32e0d5aa45 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -648,7 +648,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) /* Convert our logical CPU mask into a physical one. */ for_each_cpu(cpu, mask) - map |= 1 << cpu_logical_map(cpu); + map |= gic_cpu_map[cpu]; /* * Ensure that stores to Normal memory are visible to the -- cgit v1.2.3-18-g5258 From f36a3bb1a1b73a60f4df1d4c38c686cc173f50b3 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Fri, 18 Jan 2013 15:20:06 +0000 Subject: arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h This patch prepares the removal of include in the GIC and VIC irqchip drivers. Signed-off-by: Catalin Marinas Tested-by: Marc Zyngier Cc: Russell King Cc: Thomas Gleixner Cc: Rob Herring --- drivers/irqchip/irq-vic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/irqchip') diff --git a/drivers/irqchip/irq-vic.c b/drivers/irqchip/irq-vic.c index 3cf97aaebe4..e38cb00ee78 100644 --- a/drivers/irqchip/irq-vic.c +++ b/drivers/irqchip/irq-vic.c @@ -33,7 +33,7 @@ #include #include -#include +#include #include "irqchip.h" -- cgit v1.2.3-18-g5258 From de88cbb7b244f3bcd61d49fd6dec35c19192545a Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Fri, 18 Jan 2013 15:31:37 +0000 Subject: arm: Move chained_irq_(enter|exit) to a generic file These functions have been introduced by commit 10a8c383 (irq: introduce entry and exit functions for chained handlers) in asm/mach/irq.h. This patch moves them to linux/irqchip/chained_irq.h so that generic irqchip drivers do not rely on architecture specific header files. Signed-off-by: Catalin Marinas Tested-by: Marc Zyngier Cc: Russell King Cc: Thomas Gleixner Cc: Rob Herring --- drivers/irqchip/exynos-combiner.c | 1 + drivers/irqchip/irq-gic.c | 1 + 2 files changed, 2 insertions(+) (limited to 'drivers/irqchip') diff --git a/drivers/irqchip/exynos-combiner.c b/drivers/irqchip/exynos-combiner.c index 04d86a9803f..6a520135150 100644 --- a/drivers/irqchip/exynos-combiner.c +++ b/drivers/irqchip/exynos-combiner.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index a32e0d5aa45..0b1c0af646d 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -38,6 +38,7 @@ #include #include #include +#include #include #include -- cgit v1.2.3-18-g5258 From aec0095653cd9812b9a15df0315364cc6d094c59 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Mon, 14 Jan 2013 17:53:39 +0000 Subject: irqchip: gic: Call handle_bad_irq() directly Previously, the gic_handle_cascade_irq() function was calling the ARM-specific do_bad_IRQ() function which calls handle_bad_irq() after acquiring the desk->lock. Locking the cascaded IRQ desc is not needed for error reporting, so just call handle_bad_irq() directly. Signed-off-by: Catalin Marinas Tested-by: Marc Zyngier Cc: Russell King Cc: Thomas Gleixner Cc: Rob Herring --- drivers/irqchip/irq-gic.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'drivers/irqchip') diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 0b1c0af646d..974f77c887b 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -44,7 +44,6 @@ #include #include #include -#include #include "irqchip.h" @@ -324,7 +323,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) cascade_irq = irq_find_mapping(chip_data->domain, gic_irq); if (unlikely(gic_irq < 32 || gic_irq > 1020)) - do_bad_IRQ(cascade_irq, desc); + handle_bad_irq(cascade_irq, desc); else generic_handle_irq(cascade_irq); -- cgit v1.2.3-18-g5258 From c0114709ed85a5693eb74acdfa03d94f7f12e5b8 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Mon, 14 Jan 2013 18:05:37 +0000 Subject: irqchip: gic: Perform the gic_secondary_init() call via CPU notifier All the calls to gic_secondary_init() pass 0 as the first argument. Since this function is called on each CPU when starting, it can be done in a platform-independent way via a CPU notifier registered by the GIC code. Signed-off-by: Catalin Marinas Acked-by: Stephen Warren Acked-by: Viresh Kumar Acked-by: Santosh Shilimkar Acked-by: Rob Herring Acked-by: Simon Horman Tested-by: Simon Horman Acked-by: Srinidhi Kasagar Tested-by: Dinh Nguyen Acked-by: Nicolas Pitre Tested-by: Marc Zyngier Cc: Russell King Cc: Thomas Gleixner Cc: Kukjin Kim Cc: Sascha Hauer Cc: David Brown Cc: Bryan Huntsman Cc: Tony Lindgren Cc: Magnus Damm Cc: Shiraz Hashim Cc: Linus Walleij Cc: Will Deacon Cc: Kukjin Kim Cc: Barry Song --- drivers/irqchip/irq-gic.c | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) (limited to 'drivers/irqchip') diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 974f77c887b..add1fd84fc4 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -699,6 +700,25 @@ static int gic_irq_domain_xlate(struct irq_domain *d, return 0; } +#ifdef CONFIG_SMP +static int __cpuinit gic_secondary_init(struct notifier_block *nfb, + unsigned long action, void *hcpu) +{ + if (action == CPU_STARTING) + gic_cpu_init(&gic_data[0]); + return NOTIFY_OK; +} + +/* + * Notifier for enabling the GIC CPU interface. Set an arbitrarily high + * priority because the GIC needs to be up before the ARM generic timers. + */ +static struct notifier_block __cpuinitdata gic_cpu_notifier = { + .notifier_call = gic_secondary_init, + .priority = 100, +}; +#endif + const struct irq_domain_ops gic_irq_domain_ops = { .map = gic_irq_domain_map, .xlate = gic_irq_domain_xlate, @@ -789,6 +809,7 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, #ifdef CONFIG_SMP set_smp_cross_call(gic_raise_softirq); + register_cpu_notifier(&gic_cpu_notifier); #endif set_handle_irq(gic_handle_irq); @@ -799,13 +820,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, gic_pm_init(gic); } -void __cpuinit gic_secondary_init(unsigned int gic_nr) -{ - BUG_ON(gic_nr >= MAX_GIC_NR); - - gic_cpu_init(&gic_data[gic_nr]); -} - #ifdef CONFIG_OF static int gic_cnt __initdata = 0; -- cgit v1.2.3-18-g5258