From ba1eb1d825fdef40f69871caf8e5842d00efbbc5 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Tue, 14 Oct 2008 19:55:10 -0700 Subject: i915: Map status page cached for chips with GTT-based HWS location. This should improve performance by avoiding uncached reads by the CPU (the point of having a status page), and may improve stability. This patch only affects G33, GM45 and G45 chips as those are the only ones using GTT-based HWS mappings. Signed-off-by: Keith Packard Signed-off-by: Eric Anholt Signed-off-by: Dave Airlie --- drivers/gpu/drm/drm_agpsupport.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/drm/drm_agpsupport.c') diff --git a/drivers/gpu/drm/drm_agpsupport.c b/drivers/gpu/drm/drm_agpsupport.c index 2639be2db9e..3d33b8252b5 100644 --- a/drivers/gpu/drm/drm_agpsupport.c +++ b/drivers/gpu/drm/drm_agpsupport.c @@ -464,7 +464,8 @@ DRM_AGP_MEM * drm_agp_bind_pages(struct drm_device *dev, struct page **pages, unsigned long num_pages, - uint32_t gtt_offset) + uint32_t gtt_offset, + u32 type) { DRM_AGP_MEM *mem; int ret, i; @@ -472,7 +473,7 @@ drm_agp_bind_pages(struct drm_device *dev, DRM_DEBUG("\n"); mem = drm_agp_allocate_memory(dev->agp->bridge, num_pages, - AGP_USER_MEMORY); + type); if (mem == NULL) { DRM_ERROR("Failed to allocate memory for %ld pages\n", num_pages); -- cgit v1.2.3-18-g5258