From 2997609eb4c9e296d9129d45ea1f2ec99cc7c4da Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Thu, 12 Dec 2013 13:46:03 +0100 Subject: bcma: gpio: add own IRQ domain MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Input GPIO changes can generate interrupts, but we need kind of ACK for them by changing IRQ polarity. This is required to stop hardware from keep generating interrupts and generate another one on the next GPIO state change. This code allows using GPIOs with standard interrupts and add for example GPIO buttons support. Signed-off-by: Rafał Miłecki Acked-by: Hauke Mehrtens Signed-off-by: John Crispin Patchwork: http://patchwork.linux-mips.org/patch/6216/ --- drivers/bcma/Kconfig | 1 + drivers/bcma/driver_gpio.c | 134 ++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 133 insertions(+), 2 deletions(-) (limited to 'drivers/bcma') diff --git a/drivers/bcma/Kconfig b/drivers/bcma/Kconfig index 7c081b38ef3..0ee48be2383 100644 --- a/drivers/bcma/Kconfig +++ b/drivers/bcma/Kconfig @@ -75,6 +75,7 @@ config BCMA_DRIVER_GMAC_CMN config BCMA_DRIVER_GPIO bool "BCMA GPIO driver" depends on BCMA && GPIOLIB + select IRQ_DOMAIN if BCMA_HOST_SOC help Driver to provide access to the GPIO pins of the bcma bus. diff --git a/drivers/bcma/driver_gpio.c b/drivers/bcma/driver_gpio.c index 45f0996a375..9d87b97341a 100644 --- a/drivers/bcma/driver_gpio.c +++ b/drivers/bcma/driver_gpio.c @@ -9,6 +9,9 @@ */ #include +#include +#include +#include #include #include @@ -73,19 +76,133 @@ static void bcma_gpio_free(struct gpio_chip *chip, unsigned gpio) bcma_chipco_gpio_pullup(cc, 1 << gpio, 0); } +#if IS_BUILTIN(CONFIG_BCMA_HOST_SOC) static int bcma_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) { struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC) - return bcma_core_irq(cc->core); + return irq_find_mapping(cc->irq_domain, gpio); else return -EINVAL; } +static void bcma_gpio_irq_unmask(struct irq_data *d) +{ + struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d); + int gpio = irqd_to_hwirq(d); + + bcma_chipco_gpio_intmask(cc, BIT(gpio), BIT(gpio)); +} + +static void bcma_gpio_irq_mask(struct irq_data *d) +{ + struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d); + int gpio = irqd_to_hwirq(d); + + bcma_chipco_gpio_intmask(cc, BIT(gpio), 0); +} + +static struct irq_chip bcma_gpio_irq_chip = { + .name = "BCMA-GPIO", + .irq_mask = bcma_gpio_irq_mask, + .irq_unmask = bcma_gpio_irq_unmask, +}; + +static irqreturn_t bcma_gpio_irq_handler(int irq, void *dev_id) +{ + struct bcma_drv_cc *cc = dev_id; + u32 val = bcma_cc_read32(cc, BCMA_CC_GPIOIN); + u32 mask = bcma_cc_read32(cc, BCMA_CC_GPIOIRQ); + u32 pol = bcma_cc_read32(cc, BCMA_CC_GPIOPOL); + u32 irqs = (val ^ pol) & mask; + int gpio; + + if (!irqs) + return IRQ_NONE; + + for_each_set_bit(gpio, (unsigned long *)&irqs, cc->gpio.ngpio) + generic_handle_irq(bcma_gpio_to_irq(&cc->gpio, gpio)); + bcma_chipco_gpio_polarity(cc, irqs, val & irqs); + + return IRQ_HANDLED; +} + +static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc) +{ + struct gpio_chip *chip = &cc->gpio; + int gpio, hwirq, err; + + if (cc->core->bus->hosttype != BCMA_HOSTTYPE_SOC) + return 0; + + cc->irq_domain = irq_domain_add_linear(NULL, chip->ngpio, + &irq_domain_simple_ops, cc); + if (!cc->irq_domain) { + err = -ENODEV; + goto err_irq_domain; + } + for (gpio = 0; gpio < chip->ngpio; gpio++) { + int irq = irq_create_mapping(cc->irq_domain, gpio); + + irq_set_chip_data(irq, cc); + irq_set_chip_and_handler(irq, &bcma_gpio_irq_chip, + handle_simple_irq); + } + + hwirq = bcma_core_irq(cc->core); + err = request_irq(hwirq, bcma_gpio_irq_handler, IRQF_SHARED, "gpio", + cc); + if (err) + goto err_req_irq; + + bcma_cc_set32(cc, BCMA_CC_IRQMASK, BCMA_CC_IRQ_GPIO); + + return 0; + +err_req_irq: + for (gpio = 0; gpio < chip->ngpio; gpio++) { + int irq = irq_find_mapping(cc->irq_domain, gpio); + + irq_dispose_mapping(irq); + } + irq_domain_remove(cc->irq_domain); +err_irq_domain: + return err; +} + +static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc) +{ + struct gpio_chip *chip = &cc->gpio; + int gpio; + + if (cc->core->bus->hosttype != BCMA_HOSTTYPE_SOC) + return; + + bcma_cc_mask32(cc, BCMA_CC_IRQMASK, ~BCMA_CC_IRQ_GPIO); + free_irq(bcma_core_irq(cc->core), cc); + for (gpio = 0; gpio < chip->ngpio; gpio++) { + int irq = irq_find_mapping(cc->irq_domain, gpio); + + irq_dispose_mapping(irq); + } + irq_domain_remove(cc->irq_domain); +} +#else +static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc) +{ + return 0; +} + +static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc) +{ +} +#endif + int bcma_gpio_init(struct bcma_drv_cc *cc) { struct gpio_chip *chip = &cc->gpio; + int err; chip->label = "bcma_gpio"; chip->owner = THIS_MODULE; @@ -95,7 +212,9 @@ int bcma_gpio_init(struct bcma_drv_cc *cc) chip->set = bcma_gpio_set_value; chip->direction_input = bcma_gpio_direction_input; chip->direction_output = bcma_gpio_direction_output; +#if IS_BUILTIN(CONFIG_BCMA_HOST_SOC) chip->to_irq = bcma_gpio_to_irq; +#endif chip->ngpio = 16; /* There is just one SoC in one device and its GPIO addresses should be * deterministic to address them more easily. The other buses could get @@ -105,10 +224,21 @@ int bcma_gpio_init(struct bcma_drv_cc *cc) else chip->base = -1; - return gpiochip_add(chip); + err = bcma_gpio_irq_domain_init(cc); + if (err) + return err; + + err = gpiochip_add(chip); + if (err) { + bcma_gpio_irq_domain_exit(cc); + return err; + } + + return 0; } int bcma_gpio_unregister(struct bcma_drv_cc *cc) { + bcma_gpio_irq_domain_exit(cc); return gpiochip_remove(&cc->gpio); } -- cgit v1.2.3-18-g5258 From 978e55d2d83b6006fe0801877526ae240d41fd36 Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Thu, 2 Jan 2014 19:01:08 +0100 Subject: bcma: prevent irq handler from firing when registered MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With this patch we prevent the irq from being fired when it is registered. The Hardware fires an IRQ when input signal XOR polarity AND gpio mask is 1. Now we are setting polarity to a vlaue so that is is 0 when we register it. In addition we also set the irq mask register to 0 when the irq handler is initialized, so all gpio irqs are masked and there will be no unexpected irq. Signed-off-by: Hauke Mehrtens Tested-by: Rafał Miłecki Signed-off-by: John Crispin Patchwork: http://patchwork.linux-mips.org/patch/6304/ --- drivers/bcma/driver_gpio.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/bcma') diff --git a/drivers/bcma/driver_gpio.c b/drivers/bcma/driver_gpio.c index 9d87b97341a..040241979fc 100644 --- a/drivers/bcma/driver_gpio.c +++ b/drivers/bcma/driver_gpio.c @@ -91,7 +91,9 @@ static void bcma_gpio_irq_unmask(struct irq_data *d) { struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d); int gpio = irqd_to_hwirq(d); + u32 val = bcma_chipco_gpio_in(cc, BIT(gpio)); + bcma_chipco_gpio_polarity(cc, BIT(gpio), val); bcma_chipco_gpio_intmask(cc, BIT(gpio), BIT(gpio)); } @@ -156,6 +158,7 @@ static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc) if (err) goto err_req_irq; + bcma_chipco_gpio_intmask(cc, ~0, 0); bcma_cc_set32(cc, BCMA_CC_IRQMASK, BCMA_CC_IRQ_GPIO); return 0; -- cgit v1.2.3-18-g5258 From d5ab2adbc356473602efa128bde72135b68ae45f Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Mon, 13 Jan 2014 20:05:17 +0100 Subject: bcma: gpio: don't cast u32 to unsigned long MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Rafał Miłecki Signed-off-by: John Crispin Patchwork: http://patchwork.linux-mips.org/patch/6343/ --- drivers/bcma/driver_gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/bcma') diff --git a/drivers/bcma/driver_gpio.c b/drivers/bcma/driver_gpio.c index 040241979fc..25f9887a35d 100644 --- a/drivers/bcma/driver_gpio.c +++ b/drivers/bcma/driver_gpio.c @@ -117,13 +117,13 @@ static irqreturn_t bcma_gpio_irq_handler(int irq, void *dev_id) u32 val = bcma_cc_read32(cc, BCMA_CC_GPIOIN); u32 mask = bcma_cc_read32(cc, BCMA_CC_GPIOIRQ); u32 pol = bcma_cc_read32(cc, BCMA_CC_GPIOPOL); - u32 irqs = (val ^ pol) & mask; + unsigned long irqs = (val ^ pol) & mask; int gpio; if (!irqs) return IRQ_NONE; - for_each_set_bit(gpio, (unsigned long *)&irqs, cc->gpio.ngpio) + for_each_set_bit(gpio, &irqs, cc->gpio.ngpio) generic_handle_irq(bcma_gpio_to_irq(&cc->gpio, gpio)); bcma_chipco_gpio_polarity(cc, irqs, val & irqs); -- cgit v1.2.3-18-g5258