From cab3f16febeaf1a60e38159ff578f609f9976544 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Tue, 29 Nov 2005 13:59:03 -0800 Subject: [SPARC64]: Fix >8K I/O mappings. Increment the PFN field of the PTE so that the tests on vm_pfn in mm/memory.c match up. The TLB ignores these lower bits for larger page sizes, so it's OK to set things like this. Signed-off-by: David S. Miller --- arch/sparc64/mm/generic.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/sparc64/mm/generic.c b/arch/sparc64/mm/generic.c index d9396c1721c..580b63da836 100644 --- a/arch/sparc64/mm/generic.c +++ b/arch/sparc64/mm/generic.c @@ -77,6 +77,7 @@ static inline void io_remap_pte_range(struct mm_struct *mm, pte_t * pte, BUG_ON(!pte_none(*pte)); set_pte_at(mm, address, pte, entry); address += PAGE_SIZE; + pte_val(entry) += PAGE_SIZE; pte++; } while (address < curend); } while (address < end); -- cgit v1.2.3-18-g5258