From 638fa4aad5bbb75c8f0d558aa15dcb543de5fc31 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 24 Dec 2010 11:27:29 +0900 Subject: sh: Fix up SH4-202 clkfwk build. Some of the SH4-202 code was overlooked in the set_rate() API conversion, resulting in: arch/sh/kernel/cpu/sh4/clock-sh4-202.c: error: too many arguments to function 'clk->ops->set_rate' Fix it up. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/clock-sh4-202.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c index b601fa3978d..6282a839e08 100644 --- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c +++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c @@ -81,8 +81,7 @@ static void shoc_clk_init(struct clk *clk) for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++) { int divisor = frqcr3_divisors[i]; - if (clk->ops->set_rate(clk, clk->parent->rate / - divisor, 0) == 0) + if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0) break; } -- cgit v1.2.3-18-g5258 From 27434f0af0fecba71fa58407715028d2b9550956 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 24 Dec 2010 11:30:10 +0900 Subject: sh: mach-se: Fix up SE7206 build. With some recent tidying of duplicate register definitions the se7206 IRQ code broke: arch/sh/boards/mach-se/7206/irq.c: error: 'INTC_ICR' undeclared (first use in this function) arch/sh/boards/mach-se/7206/irq.c: error: (Each undeclared identifier is reported only once arch/sh/boards/mach-se/7206/irq.c: error: for each function it appears in.) Fix it up. Signed-off-by: Paul Mundt --- arch/sh/boards/mach-se/7206/irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c index d961949600f..9070d7e6070 100644 --- a/arch/sh/boards/mach-se/7206/irq.c +++ b/arch/sh/boards/mach-se/7206/irq.c @@ -140,7 +140,7 @@ void __init init_se7206_IRQ(void) make_se7206_irq(IRQ1_IRQ); /* ATA */ make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ - __raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR); /* ICR1 */ + __raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR1); /* ICR1 */ /* FPGA System register setup*/ __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */ -- cgit v1.2.3-18-g5258 From 27f1acccd4d310e941d2e879445324595e2fe463 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 24 Dec 2010 12:15:57 +0900 Subject: sh: Fix up SH7201 clkfwk build. The master clock initialization for SH7201 was wholly bogus. Users of the legacy API must initialize the clock rate through the struct clk itself rather than returning the clock frequency. Given that the init function itself is void, returning the frequency isn't terribly effective. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh2a/clock-sh7201.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c index b26264dc2ae..c509c40cba4 100644 --- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c @@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12}; static void master_clk_init(struct clk *clk) { - return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; + clk->rate = 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; } static struct clk_ops sh7201_master_clk_ops = { -- cgit v1.2.3-18-g5258