From 72af2b363107df9cd67985ecb8495bbdff3c9857 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Mon, 11 May 2009 09:58:19 -0700 Subject: ARM: OMAP: Fix printing of reserved memory for frambuffer Print reserved memory only if it was actually reserved. Signed-off-by: Tomi Valkeinen Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/fb.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c index ce6b4baeede..3746222bed1 100644 --- a/arch/arm/plat-omap/fb.c +++ b/arch/arm/plat-omap/fb.c @@ -206,9 +206,10 @@ void __init omapfb_reserve_sdram(void) config_invalid = 1; return; } - if (rg.paddr) + if (rg.paddr) { reserve_bootmem(rg.paddr, rg.size, BOOTMEM_DEFAULT); - reserved += rg.size; + reserved += rg.size; + } omapfb_config.mem_desc.region[i] = rg; configured_regions++; } -- cgit v1.2.3-18-g5258 From 6f733a349c2b70a83b5451fbe61ef2cf67d41cdf Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Mon, 11 May 2009 09:58:19 -0700 Subject: ARM: OMAP: GPIO de-bounce clocks don't affect module idle state GPIO de-bounce clocks don't have any impact on the module idle state, so the clock code should not wait for the module to enable after the de-bounce clocks are enabled. Problem found by Kevin Hilman . Signed-off-by: Paul Walmsley Signed-off-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock34xx.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 6763b8f7302..017a30e9aa1 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -2182,7 +2182,7 @@ static struct clk wkup_32k_fck = { static struct clk gpio1_dbck = { .name = "gpio1_dbck", - .ops = &clkops_omap2_dflt_wait, + .ops = &clkops_omap2_dflt, .parent = &wkup_32k_fck, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO1_SHIFT, @@ -2427,7 +2427,7 @@ static struct clk per_32k_alwon_fck = { static struct clk gpio6_dbck = { .name = "gpio6_dbck", - .ops = &clkops_omap2_dflt_wait, + .ops = &clkops_omap2_dflt, .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO6_SHIFT, @@ -2437,7 +2437,7 @@ static struct clk gpio6_dbck = { static struct clk gpio5_dbck = { .name = "gpio5_dbck", - .ops = &clkops_omap2_dflt_wait, + .ops = &clkops_omap2_dflt, .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO5_SHIFT, @@ -2447,7 +2447,7 @@ static struct clk gpio5_dbck = { static struct clk gpio4_dbck = { .name = "gpio4_dbck", - .ops = &clkops_omap2_dflt_wait, + .ops = &clkops_omap2_dflt, .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO4_SHIFT, @@ -2457,7 +2457,7 @@ static struct clk gpio4_dbck = { static struct clk gpio3_dbck = { .name = "gpio3_dbck", - .ops = &clkops_omap2_dflt_wait, + .ops = &clkops_omap2_dflt, .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO3_SHIFT, @@ -2467,7 +2467,7 @@ static struct clk gpio3_dbck = { static struct clk gpio2_dbck = { .name = "gpio2_dbck", - .ops = &clkops_omap2_dflt_wait, + .ops = &clkops_omap2_dflt, .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO2_SHIFT, -- cgit v1.2.3-18-g5258 From eaf9393bb79a9c7c8e708669f9581ca466122430 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Tue, 12 May 2009 11:20:02 -0700 Subject: ARM: OMAP2: Fix tusb6010 init error and compilation warning Fix "tusb6010 init error 5, -19" and compilation warning from function tusb6010_platform_retime "warning: 'sysclk_ps' is used uninitialized in this function". I suppose commit c094ba34b8f780885d029ce3c2715a194b780e5d was meant to test for zero fclk_ps instead of sysclk_ps. Signed-off-by: Jarkko Nikula Cc: Roel Kluin Tested-by: Kalle Valo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/usb-tusb6010.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index 8df55f40f4c..8622c24cd27 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c @@ -187,7 +187,7 @@ int tusb6010_platform_retime(unsigned is_refclk) unsigned sysclk_ps; int status; - if (!refclk_psec || sysclk_ps == 0) + if (!refclk_psec || fclk_ps == 0) return -ENODEV; sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60; -- cgit v1.2.3-18-g5258 From c8a799b03a981b4b27d8fd7320c96cfbe781b2fb Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Tue, 12 May 2009 11:20:02 -0700 Subject: ARM: OMAP2: Fix SPI driver failure on 2420 when running multi-omap config SPI driver will do unhandled fault on OMAP2420 if trying to probe non-existing SPI busses. Register those additional busses runtime only for cpus having them. Signed-off-by: Jarkko Nikula Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/devices.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 496983ade97..894cc355818 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -354,10 +354,12 @@ static void omap_init_mcspi(void) platform_device_register(&omap2_mcspi1); platform_device_register(&omap2_mcspi2); #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) - platform_device_register(&omap2_mcspi3); + if (cpu_is_omap2430() || cpu_is_omap343x()) + platform_device_register(&omap2_mcspi3); #endif #ifdef CONFIG_ARCH_OMAP3 - platform_device_register(&omap2_mcspi4); + if (cpu_is_omap343x()) + platform_device_register(&omap2_mcspi4); #endif } -- cgit v1.2.3-18-g5258 From 4ea60b0c7a8487af5de736d394b147baf7691f3c Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 12 May 2009 11:20:03 -0700 Subject: ARM: OMAP2/3: Add name for musb clocks With the clkdev, musb_core.c needs to register clock with name "ick". Once all the platforms using the musb driver have been converted to use clockdev, the clock name does not need to be passed from the low-level init code. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock24xx.c | 2 +- arch/arm/mach-omap2/clock34xx.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c index efc59c49341..ff9b4c0b00a 100644 --- a/arch/arm/mach-omap2/clock24xx.c +++ b/arch/arm/mach-omap2/clock24xx.c @@ -206,7 +206,7 @@ static struct omap_clk omap24xx_clks[] = { CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X), CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X), CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X), - CLK(NULL, "usbhs_ick", &usbhs_ick, CK_243X), + CLK("musb_hdrc", "ick", &usbhs_ick, CK_243X), CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_243X), CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_243X), CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_243X), diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 0a14dca31e3..a0575393d0e 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -157,7 +157,7 @@ static struct omap_clk omap34xx_clks[] = { CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck, CK_343X), CLK(NULL, "ssi_sst_fck", &ssi_sst_fck, CK_343X), CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X), - CLK(NULL, "hsotgusb_ick", &hsotgusb_ick, CK_343X), + CLK("musb_hdrc", "ick", &hsotgusb_ick, CK_343X), CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X), CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X), CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X), -- cgit v1.2.3-18-g5258 From ceec1c33c36e4783cba41416f327f4bbc05218c3 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 17 Apr 2009 12:29:22 +0100 Subject: [ARM] nwfpe: Add decleration for ExtendedCPDO Add header file decleration for 'ExtendedCPDO' in fpa11.h to stop the following sparse warning: extended_cpdo.c:90:14: warning: symbol 'ExtendedCPDO' was not declared. Should it be static? Signed-off-by: Ben Dooks --- arch/arm/nwfpe/fpa11.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/nwfpe/fpa11.h b/arch/arm/nwfpe/fpa11.h index 386cbd13eaf..d3a6f9298e9 100644 --- a/arch/arm/nwfpe/fpa11.h +++ b/arch/arm/nwfpe/fpa11.h @@ -114,4 +114,8 @@ extern unsigned int SingleCPDO(struct roundingData *roundData, extern unsigned int DoubleCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd); +/* extneded_cpdo.c */ +extern unsigned int ExtendedCPDO(struct roundingData *roundData, + const unsigned int opcode, FPREG * rFd); + #endif -- cgit v1.2.3-18-g5258 From 3ea385f061d08a9509a884e347ad1007bb6c3c66 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 17 Apr 2009 12:21:56 +0100 Subject: [ARM] nwfpe: fix 'floatx80_is_nan' sparse warning The symbol 'floatx80_is_nan' prototype was defined locally in fpa11_cprt.c when it was built outside the file in softfloat-specialisze. Move this into softfloat.h to fix the following sparse warning: softfloat-specialize:276:6: warning: symbol 'floatx80_is_nan' was not declared. Should it be static? Signed-off-by: Ben Dooks --- arch/arm/nwfpe/fpa11_cprt.c | 4 ---- arch/arm/nwfpe/softfloat.h | 2 ++ 2 files changed, 2 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/nwfpe/fpa11_cprt.c b/arch/arm/nwfpe/fpa11_cprt.c index 9843dc53304..31c4eeec18b 100644 --- a/arch/arm/nwfpe/fpa11_cprt.c +++ b/arch/arm/nwfpe/fpa11_cprt.c @@ -27,10 +27,6 @@ #include "fpmodule.inl" #include "softfloat.h" -#ifdef CONFIG_FPE_NWFPE_XP -extern flag floatx80_is_nan(floatx80); -#endif - unsigned int PerformFLT(const unsigned int opcode); unsigned int PerformFIX(const unsigned int opcode); diff --git a/arch/arm/nwfpe/softfloat.h b/arch/arm/nwfpe/softfloat.h index 260fe29d73f..13e479c5da5 100644 --- a/arch/arm/nwfpe/softfloat.h +++ b/arch/arm/nwfpe/softfloat.h @@ -226,6 +226,8 @@ char floatx80_le_quiet( floatx80, floatx80 ); char floatx80_lt_quiet( floatx80, floatx80 ); char floatx80_is_signaling_nan( floatx80 ); +extern flag floatx80_is_nan(floatx80); + #endif static inline flag extractFloat32Sign(float32 a) -- cgit v1.2.3-18-g5258 From f36dd6e7c0c04a056d3441185a17e5d4e3723192 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Thu, 7 May 2009 15:07:47 +0200 Subject: [ARM] S3C64XX: GPIO include cleanup Cleanup arm/plat-s3c64xx/include/plat/gpio-bank-h.h include file. Using shift-left operation with value >32 is a bad habit. Reviewed-by: Kyungmin Park Signed-off-by: Marek Szyprowski Signed-off-by: Ben Dooks --- arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h index 81549516572..2ba1767512d 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h +++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h @@ -61,14 +61,14 @@ #define S3C64XX_GPH7_ADDR_CF1 (0x06 << 28) #define S3C64XX_GPH7_EINT_G6_7 (0x07 << 28) -#define S3C64XX_GPH8_MMC1_DATA6 (0x02 << 32) -#define S3C64XX_GPH8_MMC2_DATA2 (0x03 << 32) -#define S3C64XX_GPH8_I2S_V40_LRCLK (0x05 << 32) -#define S3C64XX_GPH8_ADDR_CF2 (0x06 << 32) -#define S3C64XX_GPH8_EINT_G6_8 (0x07 << 32) - -#define S3C64XX_GPH9_MMC1_DATA7 (0x02 << 36) -#define S3C64XX_GPH9_MMC2_DATA3 (0x03 << 36) -#define S3C64XX_GPH9_I2S_V40_DI (0x05 << 36) -#define S3C64XX_GPH9_EINT_G6_9 (0x07 << 36) +#define S3C64XX_GPH8_MMC1_DATA6 (0x02 << 0) +#define S3C64XX_GPH8_MMC2_DATA2 (0x03 << 0) +#define S3C64XX_GPH8_I2S_V40_LRCLK (0x05 << 0) +#define S3C64XX_GPH8_ADDR_CF2 (0x06 << 0) +#define S3C64XX_GPH8_EINT_G6_8 (0x07 << 0) +#define S3C64XX_GPH9_OUTPUT (0x01 << 4) +#define S3C64XX_GPH9_MMC1_DATA7 (0x02 << 4) +#define S3C64XX_GPH9_MMC2_DATA3 (0x03 << 4) +#define S3C64XX_GPH9_I2S_V40_DI (0x05 << 4) +#define S3C64XX_GPH9_EINT_G6_9 (0x07 << 4) -- cgit v1.2.3-18-g5258 From beb9f4ed22ee618ffcf5064ff7d5ca4cfc83104b Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Thu, 7 May 2009 15:07:41 +0200 Subject: [ARM] S3C64XX: fix GPIO debug Fix compilation bug when debug was enabled Reviewed-by: Kyungmin Park Signed-off-by: Marek Szyprowski Signed-off-by: Ben Dooks --- arch/arm/plat-s3c64xx/gpiolib.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/plat-s3c64xx/gpiolib.c index ee9188add8f..78ee52cffc9 100644 --- a/arch/arm/plat-s3c64xx/gpiolib.c +++ b/arch/arm/plat-s3c64xx/gpiolib.c @@ -57,7 +57,7 @@ #if 1 #define gpio_dbg(x...) do { } while(0) #else -#define gpio_dbg(x...) printk(KERN_DEBUG ## x) +#define gpio_dbg(x...) printk(KERN_DEBUG x) #endif /* The s3c64xx_gpiolib_4bit routines are to control the gpio banks where -- cgit v1.2.3-18-g5258 From 871fcd7cf791b853ae044f813db94caefbf66725 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 15 May 2009 14:20:53 +0100 Subject: [ARM] S3C24XX: Fix unused code warning in arch/arm/plat-s3c24xx/dma.c Fix unused code warning in arch/arm/plat-s3c24xx/dma.c if there is no PM support enabled. The function to_dma_chan() should be marked inline so that the compiler will eliminate it without warning if it isn't used. arch/arm/plat-s3c24xx/dma.c:1239: warning: 'to_dma_chan' defined but not used Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index aee2aeb46c6..07326f63236 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -1235,7 +1235,7 @@ int s3c2410_dma_getposition(unsigned int channel, dma_addr_t *src, dma_addr_t *d EXPORT_SYMBOL(s3c2410_dma_getposition); -static struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev) +static inline struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev) { return container_of(dev, struct s3c2410_dma_chan, dev); } -- cgit v1.2.3-18-g5258 From a8af6de00fafed316fea8f39d87c7e8e19ec1ea0 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 15 May 2009 14:57:09 +0100 Subject: [ARM] S3C2410: mach-bast.c registering i2c data too early The BAST support code is calling s3c_i2c0_set_platdata() from the map_io() entry, instead of the bast_init() code. This causes the registration to fail due to kmalloc() not being available at the time. This fixes the following error: s3c_i2c0_set_platdata: no memory for platform data Signed-off-by: Ben Dooks --- arch/arm/mach-s3c2410/mach-bast.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 4389c160f7d..8637dea5e15 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -588,8 +588,6 @@ static void __init bast_map_io(void) s3c_device_nand.dev.platform_data = &bast_nand_info; - s3c_i2c0_set_platdata(&bast_i2c_info); - s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); s3c24xx_init_clocks(0); s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs)); @@ -602,6 +600,7 @@ static void __init bast_init(void) sysdev_class_register(&bast_pm_sysclass); sysdev_register(&bast_pm_sysdev); + s3c_i2c0_set_platdata(&bast_i2c_info); s3c24xx_fb_set_platdata(&bast_fb_info); platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices)); -- cgit v1.2.3-18-g5258 From 3ac19bb443255579b30f05af5e688b6c73b1bb91 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 15 May 2009 15:21:57 +0100 Subject: [ARM] S3C: Do not set clk->owner field if unset The s3c24xx_register_clock() function has been doing a test on clk->owner to see if it is NULL, and then setting itself as the owner if clk->owner == NULL. This is not needed, arch/arm/plat-s3c/clock.c cannot be compiled as a module, and even if it was, it should not be playing with this field if it being registered from somewhere else. The best course of action is to remove this bit of code completely. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/clock.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-s3c/clock.c b/arch/arm/plat-s3c/clock.c index b6be76e2fe5..4d01ef1a25d 100644 --- a/arch/arm/plat-s3c/clock.c +++ b/arch/arm/plat-s3c/clock.c @@ -306,8 +306,6 @@ struct clk s3c24xx_uclk = { int s3c24xx_register_clock(struct clk *clk) { - clk->owner = THIS_MODULE; - if (clk->enable == NULL) clk->enable = clk_null_enable; -- cgit v1.2.3-18-g5258 From e102657ed16bbed49820d9c58509220fc8d9289a Mon Sep 17 00:00:00 2001 From: Vikram Pandita Date: Sat, 16 May 2009 08:28:16 -0700 Subject: ARM: OMAP3: Fix number of GPIO lines for 34xx As per 3430 TRM, there are 6 banks [0 to 191] Signed-off-by: Tom Rix Signed-off-by: Vikram Pandita Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 17d7afe42b8..ee0b21f5b09 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -307,7 +307,7 @@ static inline int gpio_valid(int gpio) return 0; if (cpu_is_omap24xx() && gpio < 128) return 0; - if (cpu_is_omap34xx() && gpio < 160) + if (cpu_is_omap34xx() && gpio < 192) return 0; return -1; } -- cgit v1.2.3-18-g5258 From 8dbe43930a4e9bede88eb67a9c613773a2747caf Mon Sep 17 00:00:00 2001 From: Kalle Jokiniemi Date: Sat, 16 May 2009 08:28:17 -0700 Subject: ARM: OMAP3: Fix HW SAVEANDRESTORE shift define The OMAP3430ES2_SAVEANDRESTORE_SHIFT macro is used by powerdomain code in "1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT" manner, but the definition was also (1 << 4), meaning we actually modified bit 16. So the definition needs to be 4. This fixes also a cold reset HW bug in OMAP3430 ES3.x where some of the efuse bits are not isolated during wake-up from off mode. This can cause randomish cold resets with off mode. Enabling the USBTLL hardware SAVEANDRESTORE causes the core power up assert to be delayed in a way that we will not get faulty values when boot ROM is reading the unisolated registers. Signed-off-by: Kalle Jokiniemi Acked-by: Kevin Hilman Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/prm-regbits-34xx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h index c6a7940f428..9fd03a2ec95 100644 --- a/arch/arm/mach-omap2/prm-regbits-34xx.h +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h @@ -409,7 +409,7 @@ /* PM_PREPWSTST_CAM specific bits */ /* PM_PWSTCTRL_USBHOST specific bits */ -#define OMAP3430ES2_SAVEANDRESTORE_SHIFT (1 << 4) +#define OMAP3430ES2_SAVEANDRESTORE_SHIFT 4 /* RM_RSTST_PER specific bits */ -- cgit v1.2.3-18-g5258 From 005187eecaa400b4b43d9f640fbde9fcc50f37c1 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Sat, 16 May 2009 08:28:17 -0700 Subject: ARM: OMAP2/3: Change omapfb to use clkdev for dispc and rfbi, v2 This makes the framebuffer work on omap3. Also fix the clk_get usage for checkpatch.pl "ERROR: do not use assignment in if condition". Cc: Imre Deak Cc: linux-fbdev-devel@lists.sourceforge.net Acked-by: Krzysztof Helt Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock24xx.c | 8 ++++---- arch/arm/mach-omap2/clock34xx.c | 10 +++++----- 2 files changed, 9 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c index ff9b4c0b00a..e4cef333e29 100644 --- a/arch/arm/mach-omap2/clock24xx.c +++ b/arch/arm/mach-omap2/clock24xx.c @@ -103,10 +103,10 @@ static struct omap_clk omap24xx_clks[] = { CLK(NULL, "mdm_ick", &mdm_ick, CK_243X), CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), /* DSS domain clocks */ - CLK(NULL, "dss_ick", &dss_ick, CK_243X | CK_242X), - CLK(NULL, "dss1_fck", &dss1_fck, CK_243X | CK_242X), - CLK(NULL, "dss2_fck", &dss2_fck, CK_243X | CK_242X), - CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X | CK_242X), + CLK("omapfb", "ick", &dss_ick, CK_243X | CK_242X), + CLK("omapfb", "dss1_fck", &dss1_fck, CK_243X | CK_242X), + CLK("omapfb", "dss2_fck", &dss2_fck, CK_243X | CK_242X), + CLK("omapfb", "tv_fck", &dss_54m_fck, CK_243X | CK_242X), /* L3 domain clocks */ CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X), CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X), diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index a0575393d0e..ba05aa42bd8 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -197,11 +197,11 @@ static struct omap_clk omap34xx_clks[] = { CLK("omap_rng", "ick", &rng_ick, CK_343X), CLK(NULL, "sha11_ick", &sha11_ick, CK_343X), CLK(NULL, "des1_ick", &des1_ick, CK_343X), - CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck, CK_343X), - CLK(NULL, "dss_tv_fck", &dss_tv_fck, CK_343X), - CLK(NULL, "dss_96m_fck", &dss_96m_fck, CK_343X), - CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck, CK_343X), - CLK(NULL, "dss_ick", &dss_ick, CK_343X), + CLK("omapfb", "dss1_fck", &dss1_alwon_fck, CK_343X), + CLK("omapfb", "tv_fck", &dss_tv_fck, CK_343X), + CLK("omapfb", "video_fck", &dss_96m_fck, CK_343X), + CLK("omapfb", "dss2_fck", &dss2_alwon_fck, CK_343X), + CLK("omapfb", "ick", &dss_ick, CK_343X), CLK(NULL, "cam_mclk", &cam_mclk, CK_343X), CLK(NULL, "cam_ick", &cam_ick, CK_343X), CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X), -- cgit v1.2.3-18-g5258 From ff05c0330b9880f9ccbb7fa40f2ed3b5842f5693 Mon Sep 17 00:00:00 2001 From: Hartley Sweeten Date: Thu, 7 May 2009 18:41:47 +0100 Subject: [ARM] 5509/1: ep93xx: clkdev enable UARTS Fix the clkdev API support for the ep93xx uart clocks. The uarts available in the ep93xx have individual clock controls. The current implementation assumes that the bootloader has enabled the clocks before the kernel has booted. It also assumes that the bootloader has set the UARTBAUD bit indicating that the uarts are running off the 14.7456MHz external crystal. This fixes both issues. It also allows the uart clocks to be stopped when there are no users. Tested-by: Matthias Kaehlcke Cc: Ryan Mallon Signed-off-by: H Hartley Sweeten Signed-off-by: Russell King --- arch/arm/mach-ep93xx/clock.c | 69 ++++++++++++++++++++++--- arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | 5 +- 2 files changed, 65 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c index e8ebeaea6c4..b2eede5531c 100644 --- a/arch/arm/mach-ep93xx/clock.c +++ b/arch/arm/mach-ep93xx/clock.c @@ -21,15 +21,50 @@ #include #include + +/* + * The EP93xx has two external crystal oscillators. To generate the + * required high-frequency clocks, the processor uses two phase-locked- + * loops (PLLs) to multiply the incoming external clock signal to much + * higher frequencies that are then divided down by programmable dividers + * to produce the needed clocks. The PLLs operate independently of one + * another. + */ +#define EP93XX_EXT_CLK_RATE 14745600 +#define EP93XX_EXT_RTC_RATE 32768 + + struct clk { unsigned long rate; int users; + int sw_locked; u32 enable_reg; u32 enable_mask; + + unsigned long (*get_rate)(struct clk *clk); }; -static struct clk clk_uart = { - .rate = 14745600, + +static unsigned long get_uart_rate(struct clk *clk); + + +static struct clk clk_uart1 = { + .sw_locked = 1, + .enable_reg = EP93XX_SYSCON_DEVICE_CONFIG, + .enable_mask = EP93XX_SYSCON_DEVICE_CONFIG_U1EN, + .get_rate = get_uart_rate, +}; +static struct clk clk_uart2 = { + .sw_locked = 1, + .enable_reg = EP93XX_SYSCON_DEVICE_CONFIG, + .enable_mask = EP93XX_SYSCON_DEVICE_CONFIG_U2EN, + .get_rate = get_uart_rate, +}; +static struct clk clk_uart3 = { + .sw_locked = 1, + .enable_reg = EP93XX_SYSCON_DEVICE_CONFIG, + .enable_mask = EP93XX_SYSCON_DEVICE_CONFIG_U3EN, + .get_rate = get_uart_rate, }; static struct clk clk_pll1; static struct clk clk_f; @@ -95,9 +130,9 @@ static struct clk clk_m2m1 = { { .dev_id = dev, .con_id = con, .clk = ck } static struct clk_lookup clocks[] = { - INIT_CK("apb:uart1", NULL, &clk_uart), - INIT_CK("apb:uart2", NULL, &clk_uart), - INIT_CK("apb:uart3", NULL, &clk_uart), + INIT_CK("apb:uart1", NULL, &clk_uart1), + INIT_CK("apb:uart2", NULL, &clk_uart2), + INIT_CK("apb:uart3", NULL, &clk_uart3), INIT_CK(NULL, "pll1", &clk_pll1), INIT_CK(NULL, "fclk", &clk_f), INIT_CK(NULL, "hclk", &clk_h), @@ -125,6 +160,8 @@ int clk_enable(struct clk *clk) u32 value; value = __raw_readl(clk->enable_reg); + if (clk->sw_locked) + __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); __raw_writel(value | clk->enable_mask, clk->enable_reg); } @@ -138,13 +175,29 @@ void clk_disable(struct clk *clk) u32 value; value = __raw_readl(clk->enable_reg); + if (clk->sw_locked) + __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); __raw_writel(value & ~clk->enable_mask, clk->enable_reg); } } EXPORT_SYMBOL(clk_disable); +static unsigned long get_uart_rate(struct clk *clk) +{ + u32 value; + + value = __raw_readl(EP93XX_SYSCON_CLOCK_CONTROL); + if (value & EP93XX_SYSCON_CLOCK_UARTBAUD) + return EP93XX_EXT_CLK_RATE; + else + return EP93XX_EXT_CLK_RATE / 2; +} + unsigned long clk_get_rate(struct clk *clk) { + if (clk->get_rate) + return clk->get_rate(clk); + return clk->rate; } EXPORT_SYMBOL(clk_get_rate); @@ -162,7 +215,7 @@ static unsigned long calc_pll_rate(u32 config_word) unsigned long long rate; int i; - rate = 14745600; + rate = EP93XX_EXT_CLK_RATE; rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */ rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */ do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */ @@ -195,7 +248,7 @@ static int __init ep93xx_clock_init(void) value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); if (!(value & 0x00800000)) { /* PLL1 bypassed? */ - clk_pll1.rate = 14745600; + clk_pll1.rate = EP93XX_EXT_CLK_RATE; } else { clk_pll1.rate = calc_pll_rate(value); } @@ -206,7 +259,7 @@ static int __init ep93xx_clock_init(void) value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); if (!(value & 0x00080000)) { /* PLL2 bypassed? */ - clk_pll2.rate = 14745600; + clk_pll2.rate = EP93XX_EXT_CLK_RATE; } else if (value & 0x00040000) { /* PLL2 enabled? */ clk_pll2.rate = calc_pll_rate(value); } else { diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index f66be12b856..1732de7629a 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h @@ -159,7 +159,10 @@ #define EP93XX_SYSCON_CLOCK_SET1 EP93XX_SYSCON_REG(0x20) #define EP93XX_SYSCON_CLOCK_SET2 EP93XX_SYSCON_REG(0x24) #define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80) -#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE 0x00800000 +#define EP93XX_SYSCON_DEVICE_CONFIG_U3EN (1<<24) +#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE (1<<23) +#define EP93XX_SYSCON_DEVICE_CONFIG_U2EN (1<<20) +#define EP93XX_SYSCON_DEVICE_CONFIG_U1EN (1<<18) #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) #define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000) -- cgit v1.2.3-18-g5258 From 776abac81764847338a6a02c34609d4b8dfb4918 Mon Sep 17 00:00:00 2001 From: Ricardo Martins Date: Mon, 11 May 2009 00:15:08 +0100 Subject: [ARM] 5513/1: Eurotech VIPER SBC: fix compilation error Compilation for this board yields the following errors: arch/arm/mach-pxa/viper.c:511: error: 'FFUART' undeclared here (not in a function) arch/arm/mach-pxa/viper.c:520: error: 'BTUART' undeclared here (not in a function) arch/arm/mach-pxa/viper.c:529: error: 'STUART' undeclared here (not in a function) Fix them by including the necessary header. Signed-off-by: Ricardo Martins Signed-off-by: Russell King --- arch/arm/mach-pxa/viper.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index 0e65344e9f5..dd031cc4184 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -46,6 +46,7 @@ #include #include #include +#include #include #include -- cgit v1.2.3-18-g5258 From 826681043d7184b4d650cab5b007b9a86b628eb5 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 17 May 2009 16:20:18 +0100 Subject: [ARM] smp: fix cpumask usage in ARM SMP code The ARM SMP code wasn't properly updated for the cpumask changes, which results in smp_timer_broadcast() broadcasting ticks to non-online CPUs. Signed-off-by: Russell King --- arch/arm/common/gic.c | 4 +-- arch/arm/include/asm/hardware/gic.h | 2 +- arch/arm/include/asm/smp.h | 12 +++----- arch/arm/kernel/smp.c | 46 +++++++++++-------------------- arch/arm/mach-realview/include/mach/smp.h | 6 ++-- arch/arm/mach-realview/platsmp.c | 4 +-- 6 files changed, 28 insertions(+), 46 deletions(-) (limited to 'arch') diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index c6884ba1d5e..3e1714c6523 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -253,9 +253,9 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) } #ifdef CONFIG_SMP -void gic_raise_softirq(cpumask_t cpumask, unsigned int irq) +void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) { - unsigned long map = *cpus_addr(cpumask); + unsigned long map = *cpus_addr(*mask); /* this always happens on GIC0 */ writel(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT); diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 4924914af18..7f34333bb54 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h @@ -36,7 +36,7 @@ void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start); void gic_cpu_init(unsigned int gic_nr, void __iomem *base); void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); -void gic_raise_softirq(cpumask_t cpumask, unsigned int irq); +void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); #endif #endif diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h index fad70da5911..5995935338e 100644 --- a/arch/arm/include/asm/smp.h +++ b/arch/arm/include/asm/smp.h @@ -53,17 +53,12 @@ extern void smp_store_cpu_info(unsigned int cpuid); /* * Raise an IPI cross call on CPUs in callmap. */ -extern void smp_cross_call(cpumask_t callmap); - -/* - * Broadcast a timer interrupt to the other CPUs. - */ -extern void smp_send_timer(void); +extern void smp_cross_call(const struct cpumask *mask); /* * Broadcast a clock event to other CPUs. */ -extern void smp_timer_broadcast(cpumask_t mask); +extern void smp_timer_broadcast(const struct cpumask *mask); /* * Boot a secondary CPU, and assign it the specified idle task. @@ -102,7 +97,8 @@ extern int platform_cpu_kill(unsigned int cpu); extern void platform_cpu_enable(unsigned int cpu); extern void arch_send_call_function_single_ipi(int cpu); -extern void arch_send_call_function_ipi(cpumask_t mask); +extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); +#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask /* * Local timer interrupt handling function (can be IPI'ed). diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 7801aac3c04..6014dfd22af 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -326,14 +326,14 @@ void __init smp_prepare_boot_cpu(void) per_cpu(cpu_data, cpu).idle = current; } -static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg) +static void send_ipi_message(const struct cpumask *mask, enum ipi_msg_type msg) { unsigned long flags; unsigned int cpu; local_irq_save(flags); - for_each_cpu_mask(cpu, callmap) { + for_each_cpu(cpu, mask) { struct ipi_data *ipi = &per_cpu(ipi_data, cpu); spin_lock(&ipi->lock); @@ -344,19 +344,19 @@ static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg) /* * Call the platform specific cross-CPU call function. */ - smp_cross_call(callmap); + smp_cross_call(mask); local_irq_restore(flags); } -void arch_send_call_function_ipi(cpumask_t mask) +void arch_send_call_function_ipi_mask(const struct cpumask *mask) { send_ipi_message(mask, IPI_CALL_FUNC); } void arch_send_call_function_single_ipi(int cpu) { - send_ipi_message(cpumask_of_cpu(cpu), IPI_CALL_FUNC_SINGLE); + send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); } void show_ipi_list(struct seq_file *p) @@ -498,17 +498,10 @@ asmlinkage void __exception do_IPI(struct pt_regs *regs) void smp_send_reschedule(int cpu) { - send_ipi_message(cpumask_of_cpu(cpu), IPI_RESCHEDULE); + send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE); } -void smp_send_timer(void) -{ - cpumask_t mask = cpu_online_map; - cpu_clear(smp_processor_id(), mask); - send_ipi_message(mask, IPI_TIMER); -} - -void smp_timer_broadcast(cpumask_t mask) +void smp_timer_broadcast(const struct cpumask *mask) { send_ipi_message(mask, IPI_TIMER); } @@ -517,7 +510,7 @@ void smp_send_stop(void) { cpumask_t mask = cpu_online_map; cpu_clear(smp_processor_id(), mask); - send_ipi_message(mask, IPI_CPU_STOP); + send_ipi_message(&mask, IPI_CPU_STOP); } /* @@ -528,20 +521,17 @@ int setup_profiling_timer(unsigned int multiplier) return -EINVAL; } -static int -on_each_cpu_mask(void (*func)(void *), void *info, int wait, cpumask_t mask) +static void +on_each_cpu_mask(void (*func)(void *), void *info, int wait, + const struct cpumask *mask) { - int ret = 0; - preempt_disable(); - ret = smp_call_function_mask(mask, func, info, wait); - if (cpu_isset(smp_processor_id(), mask)) + smp_call_function_many(mask, func, info, wait); + if (cpumask_test_cpu(smp_processor_id(), mask)) func(info); preempt_enable(); - - return ret; } /**********************************************************************/ @@ -602,20 +592,17 @@ void flush_tlb_all(void) void flush_tlb_mm(struct mm_struct *mm) { - cpumask_t mask = mm->cpu_vm_mask; - - on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mask); + on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, &mm->cpu_vm_mask); } void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) { - cpumask_t mask = vma->vm_mm->cpu_vm_mask; struct tlb_args ta; ta.ta_vma = vma; ta.ta_start = uaddr; - on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mask); + on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, &vma->vm_mm->cpu_vm_mask); } void flush_tlb_kernel_page(unsigned long kaddr) @@ -630,14 +617,13 @@ void flush_tlb_kernel_page(unsigned long kaddr) void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) { - cpumask_t mask = vma->vm_mm->cpu_vm_mask; struct tlb_args ta; ta.ta_vma = vma; ta.ta_start = start; ta.ta_end = end; - on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mask); + on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, &vma->vm_mm->cpu_vm_mask); } void flush_tlb_kernel_range(unsigned long start, unsigned long end) diff --git a/arch/arm/mach-realview/include/mach/smp.h b/arch/arm/mach-realview/include/mach/smp.h index 515819efd04..e2ff53402f8 100644 --- a/arch/arm/mach-realview/include/mach/smp.h +++ b/arch/arm/mach-realview/include/mach/smp.h @@ -15,15 +15,15 @@ /* * We use IRQ1 as the IPI */ -static inline void smp_cross_call(cpumask_t callmap) +static inline void smp_cross_call(const struct cpumask *mask) { - gic_raise_softirq(callmap, 1); + gic_raise_softirq(mask, 1); } /* * Do nothing on MPcore. */ -static inline void smp_cross_call_done(cpumask_t callmap) +static inline void smp_cross_call_done(const struct cpumask *mask) { } diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index ea3c75595fa..a5730466dff 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c @@ -82,7 +82,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) * to get this processor out of WFI in the BootMonitor - make * sure that we are no longer being sent this soft interrupt */ - smp_cross_call_done(cpumask_of_cpu(cpu)); + smp_cross_call_done(cpumask_of(cpu)); /* * if any interrupts are already enabled for the primary @@ -136,7 +136,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * Use smp_cross_call() for this, since there's little * point duplicating the code here */ - smp_cross_call(cpumask_of_cpu(cpu)); + smp_cross_call(cpumask_of(cpu)); timeout = jiffies + (1 * HZ); while (time_before(jiffies, timeout)) { -- cgit v1.2.3-18-g5258 From 78d236c2b30d4712c1fd8c9768b163c94b39e77d Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 17 May 2009 16:23:45 +0100 Subject: [ARM] realview: remove useless smp_cross_call_done() smp_cross_call_done() is a no-op for MPCore, and since it's only used by platform code, there's no point in having it unless it's doing something. Signed-off-by: Russell King --- arch/arm/mach-realview/include/mach/smp.h | 7 ------- arch/arm/mach-realview/platsmp.c | 7 ------- 2 files changed, 14 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-realview/include/mach/smp.h b/arch/arm/mach-realview/include/mach/smp.h index e2ff53402f8..dd53892d44a 100644 --- a/arch/arm/mach-realview/include/mach/smp.h +++ b/arch/arm/mach-realview/include/mach/smp.h @@ -20,11 +20,4 @@ static inline void smp_cross_call(const struct cpumask *mask) gic_raise_softirq(mask, 1); } -/* - * Do nothing on MPcore. - */ -static inline void smp_cross_call_done(const struct cpumask *mask) -{ -} - #endif diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index a5730466dff..b037fd6c82d 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c @@ -77,13 +77,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu) { trace_hardirqs_off(); - /* - * the primary core may have used a "cross call" soft interrupt - * to get this processor out of WFI in the BootMonitor - make - * sure that we are no longer being sent this soft interrupt - */ - smp_cross_call_done(cpumask_of(cpu)); - /* * if any interrupts are already enabled for the primary * core (e.g. timer irq), then they will not have been enabled -- cgit v1.2.3-18-g5258 From ee348d5a1d810bc9958cabb7c27302aab235d36e Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 17 May 2009 17:00:47 +0100 Subject: [ARM] realview: fix broadcast tick support Having discussed broadcast tick support with Thomas Glexiner, the broadcast tick devices should be registered with a higher rating than the global tick device, and it should have the ONESHOT and PERIODIC feature flags set. Signed-off-by: Russell King Acked-by: Thomas Glexiner --- arch/arm/mach-realview/core.c | 8 -------- arch/arm/mach-realview/localtimer.c | 6 ++++-- arch/arm/mach-realview/platsmp.c | 6 ++---- 3 files changed, 6 insertions(+), 14 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index 942e1a7eb9b..076acbc5070 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c @@ -750,14 +750,6 @@ void __init realview_timer_init(unsigned int timer_irq) { u32 val; -#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST - /* - * The dummy clock device has to be registered before the main device - * so that the latter will broadcast the clock events - */ - local_timer_setup(); -#endif - /* * set clock frequency: * REALVIEW_REFCLK is 32KHz diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c index d0d39adf640..1c01d13460f 100644 --- a/arch/arm/mach-realview/localtimer.c +++ b/arch/arm/mach-realview/localtimer.c @@ -189,8 +189,10 @@ void __cpuinit local_timer_setup(void) struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); clk->name = "dummy_timer"; - clk->features = CLOCK_EVT_FEAT_DUMMY; - clk->rating = 200; + clk->features = CLOCK_EVT_FEAT_ONESHOT | + CLOCK_EVT_FEAT_PERIODIC | + CLOCK_EVT_FEAT_DUMMY; + clk->rating = 400; clk->mult = 1; clk->set_mode = dummy_timer_set_mode; clk->broadcast = smp_timer_broadcast; diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index b037fd6c82d..30a9c68591f 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c @@ -217,11 +217,9 @@ void __init smp_prepare_cpus(unsigned int max_cpus) if (max_cpus > ncores) max_cpus = ncores; -#ifdef CONFIG_LOCAL_TIMERS +#if defined(CONFIG_LOCAL_TIMERS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) /* - * Enable the local timer for primary CPU. If the device is - * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in - * realview_timer_init + * Enable the local timer or broadcast device for the boot CPU. */ local_timer_setup(); #endif -- cgit v1.2.3-18-g5258 From eb33575cf67d3f35fa2510210ef92631266e2465 Mon Sep 17 00:00:00 2001 From: Mel Gorman Date: Wed, 13 May 2009 17:34:48 +0100 Subject: [ARM] Double check memmap is actually valid with a memmap has unexpected holes V2 pfn_valid() is meant to be able to tell if a given PFN has valid memmap associated with it or not. In FLATMEM, it is expected that holes always have valid memmap as long as there is valid PFNs either side of the hole. In SPARSEMEM, it is assumed that a valid section has a memmap for the entire section. However, ARM and maybe other embedded architectures in the future free memmap backing holes to save memory on the assumption the memmap is never used. The page_zone linkages are then broken even though pfn_valid() returns true. A walker of the full memmap must then do this additional check to ensure the memmap they are looking at is sane by making sure the zone and PFN linkages are still valid. This is expensive, but walkers of the full memmap are extremely rare. This was caught before for FLATMEM and hacked around but it hits again for SPARSEMEM because the page_zone linkages can look ok where the PFN linkages are totally screwed. This looks like a hatchet job but the reality is that any clean solution would end up consumning all the memory saved by punching these unexpected holes in the memmap. For example, we tried marking the memmap within the section invalid but the section size exceeds the size of the hole in most cases so pfn_valid() starts returning false where valid memmap exists. Shrinking the size of the section would increase memory consumption offsetting the gains. This patch identifies when an architecture is punching unexpected holes in the memmap that the memory model cannot automatically detect and sets ARCH_HAS_HOLES_MEMORYMODEL. At the moment, this is restricted to EP93xx which is the model sub-architecture this has been reported on but may expand later. When set, walkers of the full memmap must call memmap_valid_within() for each PFN and passing in what it expects the page and zone to be for that PFN. If it finds the linkages to be broken, it assumes the memmap is invalid for that PFN. Signed-off-by: Mel Gorman Signed-off-by: Russell King --- arch/arm/Kconfig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e60ec54df33..9d02cdb15b2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -273,6 +273,7 @@ config ARCH_EP93XX select HAVE_CLK select COMMON_CLKDEV select ARCH_REQUIRE_GPIOLIB + select ARCH_HAS_HOLES_MEMORYMODEL help This enables support for the Cirrus EP93xx series of CPUs. @@ -976,10 +977,9 @@ config OABI_COMPAT UNPREDICTABLE (in fact it can be predicted that it won't work at all). If in doubt say Y. -config ARCH_FLATMEM_HAS_HOLES +config ARCH_HAS_HOLES_MEMORYMODEL bool - default y - depends on FLATMEM + default n # Discontigmem is deprecated config ARCH_DISCONTIGMEM_ENABLE -- cgit v1.2.3-18-g5258 From 8190b37f6483fedc530110d8c7d710d1c0317ba4 Mon Sep 17 00:00:00 2001 From: Pavel Roskin Date: Tue, 12 May 2009 13:36:46 -0700 Subject: [ARM] mach-l7200: fix spelling of SYS_CLOCK_OFF Signed-off-by: Pavel Roskin Signed-off-by: Andrew Morton Signed-off-by: Russell King --- arch/arm/mach-l7200/include/mach/sys-clock.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-l7200/include/mach/sys-clock.h b/arch/arm/mach-l7200/include/mach/sys-clock.h index 2d7722be60e..e9729a35751 100644 --- a/arch/arm/mach-l7200/include/mach/sys-clock.h +++ b/arch/arm/mach-l7200/include/mach/sys-clock.h @@ -18,7 +18,7 @@ /* IO_START and IO_BASE are defined in hardware.h */ -#define SYS_CLOCK_START (IO_START + SYS_CLCOK_OFF) /* Physical address */ +#define SYS_CLOCK_START (IO_START + SYS_CLOCK_OFF) /* Physical address */ #define SYS_CLOCK_BASE (IO_BASE + SYS_CLOCK_OFF) /* Virtual address */ /* Define the interface to the SYS_CLOCK */ -- cgit v1.2.3-18-g5258 From 982db66352d31892f624390cfb64a1cea5df765a Mon Sep 17 00:00:00 2001 From: Rabin Vincent Date: Mon, 18 May 2009 17:29:30 +0100 Subject: [ARM] 5518/1: versatile: don't put clock lookups in __initdata Remove the __initdata annotation for the clock lookups, since they will be needed when loading modules which use clk_get(). Signed-off-by: Rabin Vincent Signed-off-by: Russell King --- arch/arm/mach-versatile/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 1f929c391af..b3bebcc5623 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -413,7 +413,7 @@ static struct clk ref24_clk = { .rate = 24000000, }; -static struct clk_lookup lookups[] __initdata = { +static struct clk_lookup lookups[] = { { /* UART0 */ .dev_id = "dev:f1", .clk = &ref24_clk, -- cgit v1.2.3-18-g5258 From a93ea9b357a4d4fce9a1f65bf9c152fb67c30716 Mon Sep 17 00:00:00 2001 From: Rabin Vincent Date: Mon, 18 May 2009 17:26:08 +0100 Subject: [ARM] 5517/1: integrator: don't put clock lookups in __initdata Remove the __initdata annotation for the clock lookups, since they will be needed when loading modules which use clk_get(). Signed-off-by: Rabin Vincent Signed-off-by: Russell King --- arch/arm/mach-integrator/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index 6f887291307..a0f60e55da6 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c @@ -121,7 +121,7 @@ static struct clk uartclk = { .rate = 14745600, }; -static struct clk_lookup lookups[] __initdata = { +static struct clk_lookup lookups[] = { { /* UART0 */ .dev_id = "mb:16", .clk = &uartclk, -- cgit v1.2.3-18-g5258 From 950312ce22696ddfa42a957bdadaa9c24151e679 Mon Sep 17 00:00:00 2001 From: Andrew Randrianasulu Date: Thu, 14 May 2009 11:29:27 -0700 Subject: MIPS: IP32: Fix hang on shutdown in power button interrupt handler. The hang was caused by the use of disable_irq() from the interrupt handler itself. Fixed by the use of disable_irq_nosync(). The issue was triggered by: commit 3aa551c9b4c40018f0e261a178e3d25478dc04a9 Author: Thomas Gleixner Date: Mon Mar 23 18:28:15 2009 +0100 genirq: add threaded interrupt handler support Signed-off-by: Ralf Baechle --- arch/mips/sgi-ip32/ip32-reset.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/sgi-ip32/ip32-reset.c b/arch/mips/sgi-ip32/ip32-reset.c index b6cab089561..667da932b7b 100644 --- a/arch/mips/sgi-ip32/ip32-reset.c +++ b/arch/mips/sgi-ip32/ip32-reset.c @@ -145,7 +145,7 @@ static irqreturn_t ip32_rtc_int(int irq, void *dev_id) "%s: RTC IRQ without RTC_IRQF\n", __func__); } /* Wait until interrupt goes away */ - disable_irq(MACEISA_RTC_IRQ); + disable_irq_nosync(MACEISA_RTC_IRQ); init_timer(&debounce_timer); debounce_timer.function = debounce; debounce_timer.expires = jiffies + 50; -- cgit v1.2.3-18-g5258 From 7e9e05cad94217498e4d9bd6ef7137b4e9e7ed64 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 16 May 2009 12:23:45 +0100 Subject: MIPS: IP22: Fix hang in power button interrupt handler The hang was caused by the use of disable_irq() from the interrupt handler itself. Fixed by the use of disable_irq_nosync(). The issue was triggered by: commit 3aa551c9b4c40018f0e261a178e3d25478dc04a9 Author: Thomas Gleixner Date: Mon Mar 23 18:28:15 2009 +0100 genirq: add threaded interrupt handler support Signed-off-by: Ralf Baechle --- arch/mips/sgi-ip22/ip22-reset.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/sgi-ip22/ip22-reset.c b/arch/mips/sgi-ip22/ip22-reset.c index 4ad5c3393fd..45b6694c207 100644 --- a/arch/mips/sgi-ip22/ip22-reset.c +++ b/arch/mips/sgi-ip22/ip22-reset.c @@ -148,7 +148,7 @@ static irqreturn_t panel_int(int irq, void *dev_id) if (sgint->istat1 & SGINT_ISTAT1_PWR) { /* Wait until interrupt goes away */ - disable_irq(SGI_PANEL_IRQ); + disable_irq_nosync(SGI_PANEL_IRQ); init_timer(&debounce_timer); debounce_timer.function = debounce; debounce_timer.expires = jiffies + 5; -- cgit v1.2.3-18-g5258 From 195d1a96ae5fdfbedb8dc4b97afee578921fa99e Mon Sep 17 00:00:00 2001 From: peter fuerst Date: Sun, 17 May 2009 23:49:45 +0200 Subject: MIPS: IP28: Change to build with -mr10k-cache-barrier=store Richard Sandiford's new code for inserting the cache-barriers, for GCC 4.3 and above and already incorporated in the current GCC-release, uses a slightly different option-syntax. Signed-off-by: peter fuerst Signed-off-by: Ralf Baechle --- arch/mips/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 26947ab8526..c4cae9e6b80 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -473,12 +473,12 @@ endif # Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys # ifdef CONFIG_SGI_IP28 - ifeq ($(call cc-option-yn,-mr10k-cache-barrier=1), n) - $(error gcc doesn't support needed option -mr10k-cache-barrier=1) + ifeq ($(call cc-option-yn,-mr10k-cache-barrier=store), n) + $(error gcc doesn't support needed option -mr10k-cache-barrier=store) endif endif core-$(CONFIG_SGI_IP28) += arch/mips/sgi-ip22/ -cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=1 -I$(srctree)/arch/mips/include/asm/mach-ip28 +cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=store -I$(srctree)/arch/mips/include/asm/mach-ip28 load-$(CONFIG_SGI_IP28) += 0xa800000020004000 # -- cgit v1.2.3-18-g5258 From a5e696e5d0f1377ff6beb10d2f40edb6a3d1de18 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 20 May 2009 16:12:32 +1000 Subject: MIPS: 64-bit: Fix system lockup. The address range size calculation inside local_flush_tlb_kernel_range() is being truncated by a too small size variable holder on 64-bit systems. The truncated size can result in an erroneous tlbsize check that means we sit spinning inside a loop trying to flush a hige number of TLB entries. This is for all intents and purposes a system hang. Fix by using an appropriately sized valiable to hold the size. [Ralf: Greg's original patch submission identified the issue and fixed one instance in tlb-r4k.c but there there were several more. For consistency I also modified tlb-r3k.c even though that file is only used on 32-bit.] Signed-off-by: Greg Ungerer Signed-off-by: Ralf Baechle --- arch/mips/mm/tlb-r3k.c | 6 ++---- arch/mips/mm/tlb-r4k.c | 6 ++---- arch/mips/mm/tlb-r8k.c | 3 +-- 3 files changed, 5 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/mips/mm/tlb-r3k.c b/arch/mips/mm/tlb-r3k.c index f0cf46adb97..1c0048a6f5c 100644 --- a/arch/mips/mm/tlb-r3k.c +++ b/arch/mips/mm/tlb-r3k.c @@ -82,8 +82,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, int cpu = smp_processor_id(); if (cpu_context(cpu, mm) != 0) { - unsigned long flags; - int size; + unsigned long size, flags; #ifdef DEBUG_TLB printk("[tlbrange<%lu,0x%08lx,0x%08lx>]", @@ -121,8 +120,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) { - unsigned long flags; - int size; + unsigned long size, flags; #ifdef DEBUG_TLB printk("[tlbrange<%lu,0x%08lx,0x%08lx>]", start, end); diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 9619f66e531..892be426787 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -117,8 +117,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, int cpu = smp_processor_id(); if (cpu_context(cpu, mm) != 0) { - unsigned long flags; - int size; + unsigned long size, flags; ENTER_CRITICAL(flags); size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; @@ -160,8 +159,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) { - unsigned long flags; - int size; + unsigned long size, flags; ENTER_CRITICAL(flags); size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; diff --git a/arch/mips/mm/tlb-r8k.c b/arch/mips/mm/tlb-r8k.c index 4f01a3be215..4ec95cc2df2 100644 --- a/arch/mips/mm/tlb-r8k.c +++ b/arch/mips/mm/tlb-r8k.c @@ -111,8 +111,7 @@ out_restore: /* Usable for KV1 addresses only! */ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) { - unsigned long flags; - int size; + unsigned long size, flags; size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; size = (size + 1) >> 1; -- cgit v1.2.3-18-g5258 From 37869fa2da1a952ed736858f8b9e45c0b9131ae9 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 20 May 2009 14:30:06 +0000 Subject: sh: ap325 camera without i2c driver fix This patch fixes the ap325rxa ncm03j camera code to handle the case where no i2c driver is present. Without this fix i2c_transfer() may be passed NULL as adapter which results in a crash. Triggered when i2c-sh_mobile.c failed to probe() due to missing MSTP clocks. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/sh/boards/board-ap325rxa.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c index 39e46919df1..f2a29641b6a 100644 --- a/arch/sh/boards/board-ap325rxa.c +++ b/arch/sh/boards/board-ap325rxa.c @@ -263,6 +263,9 @@ static int camera_probe(void) struct i2c_msg msg; int ret; + if (!a) + return -ENODEV; + camera_power(1); msg.addr = 0x6e; msg.buf = camera_ncm03j_magic; -- cgit v1.2.3-18-g5258 From 6eb0ac03899a1363ba176abe0830a9e6698c0503 Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Thu, 21 May 2009 19:10:23 +0000 Subject: powerpc/maple: Add a quirk to disable MSI for IPR on Bimini Something in the HW or FW setup is busted and MSIs aren't working with IPR on Bimini, so until we figure out exaxtly what's up, we quirk them out Signed-off-by: Michael Ellerman Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/platforms/maple/pci.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch') diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c index 301855263b8..04296ffff8b 100644 --- a/arch/powerpc/platforms/maple/pci.c +++ b/arch/powerpc/platforms/maple/pci.c @@ -592,3 +592,17 @@ int maple_pci_get_legacy_ide_irq(struct pci_dev *pdev, int channel) } return irq; } + +static void __devinit quirk_ipr_msi(struct pci_dev *dev) +{ + /* Something prevents MSIs from the IPR from working on Bimini, + * and the driver has no smarts to recover. So disable MSI + * on it for now. */ + + if (machine_is(maple)) { + dev->no_msi = 1; + dev_info(&dev->dev, "Quirk disabled MSI\n"); + } +} +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, + quirk_ipr_msi); -- cgit v1.2.3-18-g5258 From 63d3892379f93b73ef905fb3449f4e4438a53b40 Mon Sep 17 00:00:00 2001 From: Wu Zhangjin Date: Thu, 21 May 2009 05:50:01 +0800 Subject: MIPS: Fix sparse warning in incompatiable argument type of clear_user. The type of the second argument of access_ok should be (void __user *). The unnecessary conversion of the clear_user address argument was causing sparse to emit warnings on the __chk_user_ptr check. Signed-off-by: Wu Zhangjin Signed-off-by: Ralf Baechle --- arch/mips/include/asm/uaccess.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/include/asm/uaccess.h b/arch/mips/include/asm/uaccess.h index 8de858f5449..c2d53c18fd3 100644 --- a/arch/mips/include/asm/uaccess.h +++ b/arch/mips/include/asm/uaccess.h @@ -956,7 +956,7 @@ __clear_user(void __user *addr, __kernel_size_t size) void __user * __cl_addr = (addr); \ unsigned long __cl_size = (n); \ if (__cl_size && access_ok(VERIFY_WRITE, \ - ((unsigned long)(__cl_addr)), __cl_size)) \ + __cl_addr, __cl_size)) \ __cl_size = __clear_user(__cl_addr, __cl_size); \ __cl_size; \ }) -- cgit v1.2.3-18-g5258 From 63c901c7e6fb878805cd2f8f14fa3eee8c03ee84 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 22 May 2009 10:48:17 +0100 Subject: MIPS: IP32: Fix build error due to uninitialized variable. CC arch/mips/sgi-ip32/ip32-reset.o cc1: warnings being treated as errors arch/mips/sgi-ip32/ip32-reset.c: In function 'debounce': arch/mips/sgi-ip32/ip32-reset.c:97: error: 'reg_a' is used uninitialized in this function The issues is old but due to the volatile keyword gcc older than 4.4 did not warn about this obvious bug. Signed-off-by: Ralf Baechle --- arch/mips/sgi-ip32/ip32-reset.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/mips/sgi-ip32/ip32-reset.c b/arch/mips/sgi-ip32/ip32-reset.c index 667da932b7b..cc549a9a99e 100644 --- a/arch/mips/sgi-ip32/ip32-reset.c +++ b/arch/mips/sgi-ip32/ip32-reset.c @@ -94,6 +94,7 @@ static void debounce(unsigned long data) volatile unsigned char reg_a, reg_c, xctrl_a; reg_c = CMOS_READ(RTC_INTR_FLAGS); + reg_a = CMOS_READ(RTC_REG_A); CMOS_WRITE(reg_a | DS_REGA_DV0, RTC_REG_A); wbflush(); xctrl_a = CMOS_READ(DS_B1_XCTRL4A); -- cgit v1.2.3-18-g5258 From d2f82c2f70d56ba4623de25edb383fec01f43b89 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 22 May 2009 10:58:43 +0100 Subject: MIPS: IP32: Remove unnecessary if not even harmful volatile keywords. They are unneeded and as the issue fixed in lmo commit 63f7ec59053e3f850ab67a9938e631bcba64c6ce shows even harmful. Signed-off-by: Ralf Baechle --- arch/mips/sgi-ip32/ip32-reset.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/mips/sgi-ip32/ip32-reset.c b/arch/mips/sgi-ip32/ip32-reset.c index cc549a9a99e..9b95d80ebc6 100644 --- a/arch/mips/sgi-ip32/ip32-reset.c +++ b/arch/mips/sgi-ip32/ip32-reset.c @@ -53,7 +53,7 @@ static inline void ip32_machine_halt(void) static void ip32_machine_power_off(void) { - volatile unsigned char reg_a, xctrl_a, xctrl_b; + unsigned char reg_a, xctrl_a, xctrl_b; disable_irq(MACEISA_RTC_IRQ); reg_a = CMOS_READ(RTC_REG_A); @@ -91,7 +91,7 @@ static void blink_timeout(unsigned long data) static void debounce(unsigned long data) { - volatile unsigned char reg_a, reg_c, xctrl_a; + unsigned char reg_a, reg_c, xctrl_a; reg_c = CMOS_READ(RTC_INTR_FLAGS); reg_a = CMOS_READ(RTC_REG_A); @@ -138,7 +138,7 @@ static inline void ip32_power_button(void) static irqreturn_t ip32_rtc_int(int irq, void *dev_id) { - volatile unsigned char reg_c; + unsigned char reg_c; reg_c = CMOS_READ(RTC_INTR_FLAGS); if (!(reg_c & RTC_IRQF)) { -- cgit v1.2.3-18-g5258