From 50c744f95481f6c43a72e00a2939e1fd2248610d Mon Sep 17 00:00:00 2001 From: Rex Feany Date: Thu, 24 Sep 2009 17:16:54 +1000 Subject: powerpc/8xx: Fix regression introduced by cache coherency rewrite commit e0908085fc2391c85b85fb814ae1df377c8e0dcb upstream. After upgrading to the latest kernel on my mpc875 userspace started running incredibly slow (hours to get to a shell, even!). I tracked it down to commit 8d30c14cab30d405a05f2aaceda1e9ad57800f36, that patch removed a work-around for the 8xx. Adding it back makes my problem go away. Signed-off-by: Rex Feany Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Greg Kroah-Hartman --- arch/powerpc/mm/pgtable.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c index 627767d6169..d8e672567f7 100644 --- a/arch/powerpc/mm/pgtable.c +++ b/arch/powerpc/mm/pgtable.c @@ -30,6 +30,8 @@ #include #include +#include "mmu_decl.h" + static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); static unsigned long pte_freelist_forced_free; @@ -119,7 +121,7 @@ void pte_free_finish(void) /* * Handle i/d cache flushing, called from set_pte_at() or ptep_set_access_flags() */ -static pte_t do_dcache_icache_coherency(pte_t pte) +static pte_t do_dcache_icache_coherency(pte_t pte, unsigned long addr) { unsigned long pfn = pte_pfn(pte); struct page *page; @@ -128,6 +130,17 @@ static pte_t do_dcache_icache_coherency(pte_t pte) return pte; page = pfn_to_page(pfn); +#ifdef CONFIG_8xx + /* On 8xx, cache control instructions (particularly + * "dcbst" from flush_dcache_icache) fault as write + * operation if there is an unpopulated TLB entry + * for the address in question. To workaround that, + * we invalidate the TLB here, thus avoiding dcbst + * misbehaviour. + */ + _tlbil_va(addr, 0 /* 8xx doesn't care about PID */); +#endif + if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)) { pr_devel("do_dcache_icache_coherency... flushing\n"); flush_dcache_icache_page(page); @@ -198,7 +211,7 @@ void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte */ pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); if (pte_need_exec_flush(pte, 1)) - pte = do_dcache_icache_coherency(pte); + pte = do_dcache_icache_coherency(pte, addr); /* Perform the setting of the PTE */ __set_pte_at(mm, addr, ptep, pte, 0); @@ -216,7 +229,7 @@ int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address, { int changed; if (!dirty && pte_need_exec_flush(entry, 0)) - entry = do_dcache_icache_coherency(entry); + entry = do_dcache_icache_coherency(entry, address); changed = !pte_same(*(ptep), entry); if (changed) { if (!(vma->vm_flags & VM_HUGETLB)) -- cgit v1.2.3-18-g5258