From fe671772ab1bf5624f2c4dbe2295e6ebeb8055fc Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 31 Mar 2009 08:46:25 -0500 Subject: powerpc/85xx: Use fsl,mpc85.. as prefix for memory ctrl & l2-cache nodes Older devices tree's used "fsl,85.." instead of the preferred "fsl,mpc85.." for the memory controller & l2 cache controller nodes. The EDAC code is the only use of these and has been updated for some time to support both "fsl,85.." and "fsl,mpc85.." Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/tqm8540.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/powerpc/boot/dts/tqm8540.dts') diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts index ac9413a29f9..231bae75663 100644 --- a/arch/powerpc/boot/dts/tqm8540.dts +++ b/arch/powerpc/boot/dts/tqm8540.dts @@ -59,14 +59,14 @@ compatible = "fsl,mpc8540-immr", "simple-bus"; memory-controller@2000 { - compatible = "fsl,8540-memory-controller"; + compatible = "fsl,mpc8540-memory-controller"; reg = <0x2000 0x1000>; interrupt-parent = <&mpic>; interrupts = <18 2>; }; L2: l2-cache-controller@20000 { - compatible = "fsl,8540-l2-cache-controller"; + compatible = "fsl,mpc8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; cache-size = <0x40000>; // L2, 256K -- cgit v1.2.3-18-g5258