From 252161eccd1a44f32a506d0fedb424d4ff84e4dc Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Wed, 14 Mar 2007 21:51:26 +0900 Subject: [MIPS] merge GT64111 PCI routines and GT64120 PCI_0 routines This patch has merged GT64111 PCI routines and GT64120 PCI_0 routines. GT64111 PCI is almost the same as GT64120's PCI_0. This patch don't change GT64120 PCI routines. Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/cobalt/pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/mips/cobalt') diff --git a/arch/mips/cobalt/pci.c b/arch/mips/cobalt/pci.c index d0160063954..d91027f43de 100644 --- a/arch/mips/cobalt/pci.c +++ b/arch/mips/cobalt/pci.c @@ -14,7 +14,7 @@ #include -extern struct pci_ops gt64111_pci_ops; +extern struct pci_ops gt64xxx_pci0_ops; static struct resource cobalt_mem_resource = { .start = GT_DEF_PCI0_MEM0_BASE, @@ -31,7 +31,7 @@ static struct resource cobalt_io_resource = { }; static struct pci_controller cobalt_pci_controller = { - .pci_ops = >64111_pci_ops, + .pci_ops = >64xxx_pci0_ops, .mem_resource = &cobalt_mem_resource, .io_resource = &cobalt_io_resource, .io_offset = 0 - GT_DEF_PCI0_IO_BASE, -- cgit v1.2.3-18-g5258