From f5a3f3dc189485d607fbd42678cc23958acc0a6e Mon Sep 17 00:00:00 2001 From: Zou Nan hai Date: Thu, 14 Sep 2006 08:25:15 +0800 Subject: [IA64] Make gp value point to Region 5 in mca handler MCA dispatch code take physical address of GP passed from SAL, then call DATA_PA_TO_VA twice on GP before call into C code. The first time is in ia64_set_kernel_register, the second time is in VIRTUAL_MODE_ENTER. The gp is changed to a virtual address in region 7 because DATA_PA_TO_VA is implemented by dep instruction. However when notify blocks were called from MCA handler code, because notify blocks are supported by callback function pointers, gp value value was switched to region 5 again. The patch set gp register to kernel gp of region 5 at entry of MCA dispatch. Signed-off-by: Zou Nan hai Signed-off-by: Tony Luck --- arch/ia64/kernel/mca_asm.S | 5 ----- 1 file changed, 5 deletions(-) (limited to 'arch/ia64/kernel/mca_asm.S') diff --git a/arch/ia64/kernel/mca_asm.S b/arch/ia64/kernel/mca_asm.S index 96047491d1b..ee3ff76c8a3 100644 --- a/arch/ia64/kernel/mca_asm.S +++ b/arch/ia64/kernel/mca_asm.S @@ -1025,18 +1025,13 @@ ia64_old_stack: ia64_set_kernel_registers: add temp3=MCA_SP_OFFSET, r3 - add temp4=MCA_SOS_OFFSET+SOS(OS_GP), r3 mov b0=r2 // save return address GET_IA64_MCA_DATA(temp1) ;; - add temp4=temp4, temp1 // &struct ia64_sal_os_state.os_gp add r12=temp1, temp3 // kernel stack pointer on MCA/INIT stack add r13=temp1, r3 // set current to start of MCA/INIT stack add r20=temp1, r3 // physical start of MCA/INIT stack ;; - ld8 r1=[temp4] // OS GP from SAL OS state - ;; - DATA_PA_TO_VA(r1,temp1) DATA_PA_TO_VA(r12,temp2) DATA_PA_TO_VA(r13,temp3) ;; -- cgit v1.2.3-18-g5258 From 8f9e146732dcba5161dad3747ee73be1f8c13133 Mon Sep 17 00:00:00 2001 From: Russ Anderson Date: Mon, 18 Sep 2006 18:37:15 -0500 Subject: [IA64] ar.fpsr not set on MCA/INIT kernel entry When entering the kernel due to an MCA or INIT, ar.fpsr (ar40) was not getting set to the kernel default value (remaining at the user value). The effect depends on the user setting of ar.fpsr. In the test case, the effect was addresses printing with strange hex values. Setting ar.fpsr in ia64_set_kernel_registers sets it for both the MCA and INIT paths. The user value of ar.fpsr is correctly saved (in ia64_state_save) and restored (in ia64_state_restore). Below is an example of output with very strange hex values. Anyone know the value of hex 'g'? :-) Processes interrupted by INIT - 0 (cpu 14 task 0xdfffg55g7a4c6gA) Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck --- arch/ia64/kernel/mca_asm.S | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/ia64/kernel/mca_asm.S') diff --git a/arch/ia64/kernel/mca_asm.S b/arch/ia64/kernel/mca_asm.S index ee3ff76c8a3..c6b607c00de 100644 --- a/arch/ia64/kernel/mca_asm.S +++ b/arch/ia64/kernel/mca_asm.S @@ -1062,6 +1062,10 @@ ia64_set_kernel_registers: mov cr.itir=r18 mov cr.ifa=r13 mov r20=IA64_TR_CURRENT_STACK + + movl r17=FPSR_DEFAULT + ;; + mov.m ar.fpsr=r17 // set ar.fpsr to kernel default value ;; itr.d dtr[r20]=r21 ;; -- cgit v1.2.3-18-g5258