From f5321760ce1d65fd69facc982b8523b19edf07a0 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 27 May 2010 14:57:27 +0900 Subject: ARM: S3C64XX: Change dev-audio.c to use S3C_GPIO_SFN() for special functions To aide in changing the gpio code, remove the use of pin-specific configs and move to using the S3C_GPIO_SFN() versions. Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/dev-audio.c | 79 ++++++++++++++++++--------------------- 1 file changed, 37 insertions(+), 42 deletions(-) (limited to 'arch/arm/mach-s3c64xx') diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index 9648fbc36ee..c9a44969e64 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c @@ -22,27 +22,22 @@ #include #include -#include -#include -#include -#include - static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0); + s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(3)); break; case 1: - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0); + s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(3)); default: printk(KERN_DEBUG "Invalid I2S Controller number!"); return -EINVAL; @@ -53,13 +48,13 @@ static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0); - s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1); - s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2); - s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK); - s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK); - s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK); - s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI); + s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C_GPIO_SFN(4)); return 0; } @@ -170,18 +165,18 @@ static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT); + s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(2)); break; case 1: - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT); + s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(2)); break; default: printk(KERN_DEBUG "Invalid PCM Controller number!"); @@ -261,22 +256,22 @@ EXPORT_SYMBOL(s3c64xx_device_pcm1); static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO); + s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(4)); return 0; } static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO); + s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(4)); return 0; } -- cgit v1.2.3-18-g5258 From 2618b555d2734df3c8ca71df319d318489318083 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 27 May 2010 15:54:06 +0900 Subject: ARM: S3C64XX: Change to using s3c_gpio_cfgpin_range() Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range(). Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/dev-audio.c | 53 +++++++++----------------------- arch/arm/mach-s3c64xx/setup-sdhci-gpio.c | 8 ++--- 2 files changed, 19 insertions(+), 42 deletions(-) (limited to 'arch/arm/mach-s3c64xx') diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index c9a44969e64..e4bb02395d9 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c @@ -24,25 +24,22 @@ static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(3)); + base = S3C64XX_GPD(0); break; case 1: - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(3)); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(3)); + base = S3C64XX_GPE(0); + break; default: printk(KERN_DEBUG "Invalid I2S Controller number!"); return -EINVAL; } + s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3)); + return 0; } @@ -51,10 +48,7 @@ static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev) s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5)); s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5)); s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin_range(S3C64XX_GPH(6), 4, S3C_GPIO_SFN(4)); return 0; } @@ -163,26 +157,21 @@ EXPORT_SYMBOL(s3c64xx_device_iisv4); static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(2)); + base = S3C64XX_GPD(0); break; case 1: - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(2)); + base = S3C64XX_GPE(0); break; default: printk(KERN_DEBUG "Invalid PCM Controller number!"); return -EINVAL; } + s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2)); return 0; } @@ -256,24 +245,12 @@ EXPORT_SYMBOL(s3c64xx_device_pcm1); static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(4)); - - return 0; + return s3c_gpio_cfgpin_range(S3C64XX_GPD(0), 5, S3C_GPIO_SFN(4)); } static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(4)); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(4)); - - return 0; + return s3c_gpio_cfgpin_range(S3C64XX_GPE(0), 5, S3C_GPIO_SFN(4)); } static struct resource s3c64xx_ac97_resource[] = { diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c index 32235959137..0655c7a9bd3 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c @@ -30,8 +30,8 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) end = S3C64XX_GPG(2 + width); /* Set all the necessary GPG pins to special-function 0 */ + s3c_gpio_cfgpin_range(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2)); for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } @@ -50,8 +50,8 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) end = S3C64XX_GPH(2 + width); /* Set all the necessary GPG pins to special-function 0 */ + s3c_gpio_cfgpin_range(S3C64XX_GPH(0), 2 + width, S3C_GPIO_SFN(2)); for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } @@ -69,14 +69,14 @@ void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) end = S3C64XX_GPH(6 + width); /* Set all the necessary GPH pins to special-function 1 */ + s3c_gpio_cfgpin_range(S3C64XX_GPH(6), width, S3C_GPIO_SFN(3)); for (gpio = S3C64XX_GPH(6); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } /* Set all the necessary GPC pins to special-function 1 */ + s3c_gpio_cfgpin_range(S3C64XX_GPC(4), 2, S3C_GPIO_SFN(3)); for (gpio = S3C64XX_GPC(4); gpio < S3C64XX_GPC(6); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } } -- cgit v1.2.3-18-g5258 From dab30d7f80d7a81ac736c590a81249d2fd323c62 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 1 Oct 2010 16:39:15 +0900 Subject: ARM: S3C64XX: Change to using s3c_gpio_cfgall_range() Change the code setting a range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgall_range(). Mop up a few missed s3c_gpio_cfgpin_range() changes. Signed-off-by: Ben Dooks [kgene.kim@samsung.com: Fix small comments] Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/setup-fb-24bpp.c | 14 +++------- arch/arm/mach-s3c64xx/setup-sdhci-gpio.c | 45 +++++++++----------------------- 2 files changed, 16 insertions(+), 43 deletions(-) (limited to 'arch/arm/mach-s3c64xx') diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c index 000736877df..3b0dd124d49 100644 --- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c +++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c @@ -23,15 +23,9 @@ extern void s3c64xx_fb_gpio_setup_24bpp(void) { - unsigned int gpio; + s3c_gpio_cfgall_range(S3C64XX_GPI(0), 16, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); - for (gpio = S3C64XX_GPI(0); gpio <= S3C64XX_GPI(15); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - for (gpio = S3C64XX_GPJ(0); gpio <= S3C64XX_GPJ(11); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S3C64XX_GPJ(0), 12, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); } diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c index 0655c7a9bd3..4262f78a93c 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c @@ -24,16 +24,10 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - unsigned int end; - end = S3C64XX_GPG(2 + width); - - /* Set all the necessary GPG pins to special-function 0 */ - s3c_gpio_cfgpin_range(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2)); - for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) { - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + /* Set all the necessary GPG pins to special-function 2 */ + s3c_gpio_cfgall_range(S3C64XX_GPG(0), 2 + width, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); @@ -44,16 +38,10 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - unsigned int end; - end = S3C64XX_GPH(2 + width); - - /* Set all the necessary GPG pins to special-function 0 */ - s3c_gpio_cfgpin_range(S3C64XX_GPH(0), 2 + width, S3C_GPIO_SFN(2)); - for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + /* Set all the necessary GPH pins to special-function 2 */ + s3c_gpio_cfgall_range(S3C64XX_GPH(0), 2 + width, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); @@ -63,20 +51,11 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) { - unsigned int gpio; - unsigned int end; + /* Set all the necessary GPH pins to special-function 3 */ + s3c_gpio_cfgall_range(S3C64XX_GPH(6), width, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); - end = S3C64XX_GPH(6 + width); - - /* Set all the necessary GPH pins to special-function 1 */ - s3c_gpio_cfgpin_range(S3C64XX_GPH(6), width, S3C_GPIO_SFN(3)); - for (gpio = S3C64XX_GPH(6); gpio < end; gpio++) { - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - /* Set all the necessary GPC pins to special-function 1 */ - s3c_gpio_cfgpin_range(S3C64XX_GPC(4), 2, S3C_GPIO_SFN(3)); - for (gpio = S3C64XX_GPC(4); gpio < S3C64XX_GPC(6); gpio++) { - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + /* Set all the necessary GPC pins to special-function 3 */ + s3c_gpio_cfgall_range(S3C64XX_GPC(4), 2, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); } -- cgit v1.2.3-18-g5258 From aef698a72fbb8ba97cff1abb1fdb035c791bd106 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 20:47:21 +0900 Subject: ARM: S3C64XX: 2nd Change to using s3c_gpio_cfgall_range() This patch changes the code setting range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgpin_range(). NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/setup-ide.c | 10 +++------- arch/arm/mach-s3c64xx/setup-keypad.c | 17 ++++------------- 2 files changed, 7 insertions(+), 20 deletions(-) (limited to 'arch/arm/mach-s3c64xx') diff --git a/arch/arm/mach-s3c64xx/setup-ide.c b/arch/arm/mach-s3c64xx/setup-ide.c index c12c315f33b..de645e99ba9 100644 --- a/arch/arm/mach-s3c64xx/setup-ide.c +++ b/arch/arm/mach-s3c64xx/setup-ide.c @@ -21,7 +21,6 @@ void s3c64xx_ide_setup_gpio(void) { u32 reg; - u32 gpio = 0; reg = readl(S3C_MEM_SYS_CFG) & (~0x3f); @@ -32,15 +31,12 @@ void s3c64xx_ide_setup_gpio(void) s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4)); /* Set XhiDATA[15:0] pins as CF Data[15:0] */ - for (gpio = S3C64XX_GPK(0); gpio <= S3C64XX_GPK(15); gpio++) - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S3C64XX_GPK(0), 16, S3C_GPIO_SFN(5)); /* Set XhiADDR[2:0] pins as CF ADDR[2:0] */ - for (gpio = S3C64XX_GPL(0); gpio <= S3C64XX_GPL(2); gpio++) - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6)); + s3c_gpio_cfgpin_range(S3C64XX_GPL(0), 3, S3C_GPIO_SFN(6)); /* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */ s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1)); - for (gpio = S3C64XX_GPM(0); gpio <= S3C64XX_GPM(4); gpio++) - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6)); + s3c_gpio_cfgpin_range(S3C64XX_GPM(0), 5, S3C_GPIO_SFN(6)); } diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c64xx/setup-keypad.c index abc34e4e1a9..cc9b09c335f 100644 --- a/arch/arm/mach-s3c64xx/setup-keypad.c +++ b/arch/arm/mach-s3c64xx/setup-keypad.c @@ -15,20 +15,11 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) { - unsigned int gpio; - unsigned int end; - /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ - end = S3C64XX_GPK(8 + rows); - for (gpio = S3C64XX_GPK(8); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S3C64XX_GPK(8), 8 + rows, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ - end = S3C64XX_GPL(0 + cols); - for (gpio = S3C64XX_GPL(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(S3C64XX_GPL(0), cols, + S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); } -- cgit v1.2.3-18-g5258 From 2a1309b493ba6f42e9931a785c4eca7275bc2357 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 27 May 2010 17:25:45 +0900 Subject: ARM: S3C64XX: Change to using s3c_gpio_cfgrange_nopull() Change code setting special-function and no pull-up to use the s3c_gpio_cfgrange_nopull() wrapper. Signed-off-by: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/setup-sdhci-gpio.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) (limited to 'arch/arm/mach-s3c64xx') diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c index 4262f78a93c..6eac071afae 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c @@ -26,8 +26,7 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPG pins to special-function 2 */ - s3c_gpio_cfgall_range(S3C64XX_GPG(0), 2 + width, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); @@ -40,8 +39,7 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* Set all the necessary GPH pins to special-function 2 */ - s3c_gpio_cfgall_range(S3C64XX_GPH(0), 2 + width, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPH(0), 2 + width, S3C_GPIO_SFN(2)); if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); @@ -52,10 +50,8 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) { /* Set all the necessary GPH pins to special-function 3 */ - s3c_gpio_cfgall_range(S3C64XX_GPH(6), width, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPH(6), width, S3C_GPIO_SFN(3)); /* Set all the necessary GPC pins to special-function 3 */ - s3c_gpio_cfgall_range(S3C64XX_GPC(4), 2, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPC(4), 2, S3C_GPIO_SFN(3)); } -- cgit v1.2.3-18-g5258 From 3e9b7261502e78e351fc6a61a9b7241433c779c4 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Oct 2010 20:20:37 +0900 Subject: ARM: S3C64XX: 2nd Change to using s3c_gpio_cfgrange_nopull() This patch changes code setting special-function and no pull-up to use the s3c_gpio_cfgrange_nopull() wrapper. NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/setup-fb-24bpp.c | 7 ++----- arch/arm/mach-s3c64xx/setup-keypad.c | 6 ++---- 2 files changed, 4 insertions(+), 9 deletions(-) (limited to 'arch/arm/mach-s3c64xx') diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c index 3b0dd124d49..8f3091182f9 100644 --- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c +++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c @@ -23,9 +23,6 @@ extern void s3c64xx_fb_gpio_setup_24bpp(void) { - s3c_gpio_cfgall_range(S3C64XX_GPI(0), 16, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); - - s3c_gpio_cfgall_range(S3C64XX_GPJ(0), 12, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2)); + s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2)); } diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c64xx/setup-keypad.c index cc9b09c335f..d1fd7228ee7 100644 --- a/arch/arm/mach-s3c64xx/setup-keypad.c +++ b/arch/arm/mach-s3c64xx/setup-keypad.c @@ -16,10 +16,8 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) { /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ - s3c_gpio_cfgall_range(S3C64XX_GPK(8), 8 + rows, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3)); /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ - s3c_gpio_cfgall_range(S3C64XX_GPL(0), cols, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3)); } -- cgit v1.2.3-18-g5258 From dff2126c548d54b040997257407a69a6cdf7a5b6 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Thu, 14 Oct 2010 07:53:12 +0900 Subject: ARM: S3C64XX: Fix special function for IISv4 port When converting to use s3c_gpio_cfgpin_range() the function for the IISv4 block appears to have been typoed as 4 (the keypad) rather than 5 as it should be. Signed-off-by: Mark Brown Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/dev-audio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-s3c64xx') diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index e4bb02395d9..4a5c682a372 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c @@ -48,7 +48,7 @@ static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev) s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5)); s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5)); s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin_range(S3C64XX_GPH(6), 4, S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin_range(S3C64XX_GPH(6), 4, S3C_GPIO_SFN(5)); return 0; } -- cgit v1.2.3-18-g5258