From a1900f2efe2d75e0fe5b871421a2f2de2fa68b4e Mon Sep 17 00:00:00 2001 From: Mike Turquette Date: Fri, 7 Oct 2011 00:52:58 -0600 Subject: ARM: OMAP4: clock: round_rate and recalc functions for DPLL_ABE OMAP4 DPLL_ABE can enable a 4X multipler on top of the normal MN multipler and divider. This is achieved by setting CM_CLKMODE_DPLL_ABE.DPLL_REGM4XEN bit in CKGEN module of CM1. From the OMAP4 TRM: Fdpll = Fref x 2 x (4 x M/(N+1)) in case REGM4XEN bit field is set (only applicable to DPLL_ABE). Add new round_rate() and recalc() functions for OMAP4, that check the setting of REGM4XEN bit and handle this appropriately. The new functions are a simple wrapper on top of the existing omap2_dpll_round_rate() and omap2_dpll_get_rate() functions to handle the REGM4XEN bit. The REGM4XEN bit is only implemented for the ABE DPLL on OMAP4 and so only dpll_abe_ck uses omap4_dpll_regm4xen_round_rate() and omap4_dpll_regm4xen_recalc() functions. Signed-off-by: Mike Turquette Tested-by: Jon Hunter Signed-off-by: Jon Hunter [paul@pwsan.com: fixed attempt to return a negative from a fn returning unsigned; pass along errors from omap2_dpll_round_rate(); added documentation; added Jon's S-o-b] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock.h | 2 ++ arch/arm/mach-omap2/clock44xx.h | 7 ++++ arch/arm/mach-omap2/clock44xx_data.c | 4 +-- arch/arm/mach-omap2/dpll44xx.c | 69 ++++++++++++++++++++++++++++++++++++ 4 files changed, 80 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 48ac568881b..2311bc21722 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -66,6 +66,8 @@ void omap3_noncore_dpll_disable(struct clk *clk); int omap4_dpllmx_gatectrl_read(struct clk *clk); void omap4_dpllmx_allow_gatectrl(struct clk *clk); void omap4_dpllmx_deny_gatectrl(struct clk *clk); +long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate); +unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk); #ifdef CONFIG_OMAP_RESET_CLOCKS void omap2_clk_disable_unused(struct clk *clk); diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach-omap2/clock44xx.h index 7ceb870e7ab..287a46f78d9 100644 --- a/arch/arm/mach-omap2/clock44xx.h +++ b/arch/arm/mach-omap2/clock44xx.h @@ -8,6 +8,13 @@ #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H #define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H +/* + * OMAP4430_REGM4XEN_MULT: If the CM_CLKMODE_DPLL_ABE.DPLL_REGM4XEN bit is + * set, then the DPLL's lock frequency is multiplied by 4 (OMAP4430 TRM + * vV Section 3.6.3.3.1 "DPLLs Output Clocks Parameters") + */ +#define OMAP4430_REGM4XEN_MULT 4 + int omap4xxx_clk_init(void); #endif diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index c0b6fbda340..c98c0a22c18 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -270,8 +270,8 @@ static struct clk dpll_abe_ck = { .dpll_data = &dpll_abe_dd, .init = &omap2_init_dpll_parent, .ops = &clkops_omap3_noncore_dpll_ops, - .recalc = &omap3_dpll_recalc, - .round_rate = &omap2_dpll_round_rate, + .recalc = &omap4_dpll_regm4xen_recalc, + .round_rate = &omap4_dpll_regm4xen_round_rate, .set_rate = &omap3_noncore_dpll_set_rate, }; diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c index 4e4da6160d0..9c6a296b3dc 100644 --- a/arch/arm/mach-omap2/dpll44xx.c +++ b/arch/arm/mach-omap2/dpll44xx.c @@ -19,6 +19,7 @@ #include #include "clock.h" +#include "clock44xx.h" #include "cm-regbits-44xx.h" /* Supported only on OMAP4 */ @@ -82,3 +83,71 @@ const struct clkops clkops_omap4_dpllmx_ops = { .deny_idle = omap4_dpllmx_deny_gatectrl, }; +/** + * omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit + * @clk: struct clk * of the DPLL to compute the rate for + * + * Compute the output rate for the OMAP4 DPLL represented by @clk. + * Takes the REGM4XEN bit into consideration, which is needed for the + * OMAP4 ABE DPLL. Returns the DPLL's output rate (before M-dividers) + * upon success, or 0 upon error. + */ +unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk) +{ + u32 v; + unsigned long rate; + struct dpll_data *dd; + + if (!clk || !clk->dpll_data) + return 0; + + dd = clk->dpll_data; + + rate = omap2_get_dpll_rate(clk); + + /* regm4xen adds a multiplier of 4 to DPLL calculations */ + v = __raw_readl(dd->control_reg); + if (v & OMAP4430_DPLL_REGM4XEN_MASK) + rate *= OMAP4430_REGM4XEN_MULT; + + return rate; +} + +/** + * omap4_dpll_regm4xen_round_rate - round DPLL rate, considering REGM4XEN bit + * @clk: struct clk * of the DPLL to round a rate for + * @target_rate: the desired rate of the DPLL + * + * Compute the rate that would be programmed into the DPLL hardware + * for @clk if set_rate() were to be provided with the rate + * @target_rate. Takes the REGM4XEN bit into consideration, which is + * needed for the OMAP4 ABE DPLL. Returns the rounded rate (before + * M-dividers) upon success, -EINVAL if @clk is null or not a DPLL, or + * ~0 if an error occurred in omap2_dpll_round_rate(). + */ +long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate) +{ + u32 v; + struct dpll_data *dd; + long r; + + if (!clk || !clk->dpll_data) + return -EINVAL; + + dd = clk->dpll_data; + + /* regm4xen adds a multiplier of 4 to DPLL calculations */ + v = __raw_readl(dd->control_reg) & OMAP4430_DPLL_REGM4XEN_MASK; + + if (v) + target_rate = target_rate / OMAP4430_REGM4XEN_MULT; + + r = omap2_dpll_round_rate(clk, target_rate); + if (r == ~0) + return r; + + if (v) + clk->dpll_data->last_rounded_rate *= OMAP4430_REGM4XEN_MULT; + + return clk->dpll_data->last_rounded_rate; +} -- cgit v1.2.3-18-g5258 From addf888c6945c6e3cff135e7e3bb72cc708d1ca4 Mon Sep 17 00:00:00 2001 From: Mike Turquette Date: Fri, 7 Oct 2011 00:52:59 -0600 Subject: ARM: OMAP3+: dpll: use DPLL's round_rate when setting rate omap3_noncore_dpll_set_rate uses omap2_dpll_round_rate explicitly. Instead use the struct clk pointer's round_rate function to allow for DPLL's with special needs. An example of a clock that requires this is DPLL_ABE on OMAP4 which can have a 4x multiplier on top of the usual MN dividers depending on register settings. This requires a special round_rate function that might yield a rate different from the initial target. Signed-off-by: Mike Turquette Signed-off-by: Jon Hunter [paul@pwsan.com: split rate assignment portion into a separate patch] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/dpll3xxx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c index f77022be783..6b0fa378602 100644 --- a/arch/arm/mach-omap2/dpll3xxx.c +++ b/arch/arm/mach-omap2/dpll3xxx.c @@ -455,7 +455,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) new_parent = dd->clk_bypass; } else { if (dd->last_rounded_rate != rate) - omap2_dpll_round_rate(clk, rate); + clk->round_rate(clk, rate); if (dd->last_rounded_rate == 0) return -EINVAL; -- cgit v1.2.3-18-g5258 From 273a1ce9cf27ac3900325b59aa78cc07bb574e9e Mon Sep 17 00:00:00 2001 From: Mike Turquette Date: Fri, 7 Oct 2011 00:53:00 -0600 Subject: ARM: OMAP3+: dpll: assign clk rate from rounded rate during rate set The rounded rate can differ from target rate, so to better reflect reality set clk->rate equal to the rounded rate when setting DPLL frequency. This avoids issues where the DPLL frequency is slightly different than what debugfs clock tree reports using the old target rate. An example of a clock that requires this is DPLL_ABE on OMAP4 which can have a 4x multiplier on top of the usual MN dividers depending on register settings. This requires a special round_rate function that might yield a rate different from the initial target. Signed-off-by: Mike Turquette Signed-off-by: Jon Hunter Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/dpll3xxx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c index 6b0fa378602..73a1595c5f2 100644 --- a/arch/arm/mach-omap2/dpll3xxx.c +++ b/arch/arm/mach-omap2/dpll3xxx.c @@ -455,7 +455,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) new_parent = dd->clk_bypass; } else { if (dd->last_rounded_rate != rate) - clk->round_rate(clk, rate); + rate = clk->round_rate(clk, rate); if (dd->last_rounded_rate == 0) return -EINVAL; -- cgit v1.2.3-18-g5258 From 49642ac816a714f3037b7cd6401a46c8fe46e795 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Fri, 7 Oct 2011 00:53:01 -0600 Subject: ARM: OMAP3+: dpll: use DPLLs recalc function instead of omap2_get_dpll_rate This is a continuation of Mike Turquette's patch "OMAP3+: use DPLL's round_rate when setting rate". omap3_noncore_dpll_set_rate() and omap3_noncore_dpll_enable() call omap2_get_dpll_rate() explicitly. It may be necessary for some DPLLs to use a different function and so use the DPLLs recalc() function pointer instead. An example is the DPLL_ABE on OMAP4 which can have a 4X multiplier in addition to the usual MN multipler and dividers and therefore uses a different round_rate and recalc function. Signed-off-by: Jon Hunter Cc: Mike Turquette Cc: Misael Lopez Cruz [paul@pwsan.com: merged this patch with Mike's "use clock's recalc in DPLL handling" patch; also reported by Misael] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/dpll3xxx.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c index 73a1595c5f2..fc56745676f 100644 --- a/arch/arm/mach-omap2/dpll3xxx.c +++ b/arch/arm/mach-omap2/dpll3xxx.c @@ -390,7 +390,8 @@ int omap3_noncore_dpll_enable(struct clk *clk) * propagating? */ if (!r) - clk->rate = omap2_get_dpll_rate(clk); + clk->rate = (clk->recalc) ? clk->recalc(clk) : + omap2_get_dpll_rate(clk); return r; } @@ -424,6 +425,7 @@ void omap3_noncore_dpll_disable(struct clk *clk) int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) { struct clk *new_parent = NULL; + unsigned long hw_rate; u16 freqsel = 0; struct dpll_data *dd; int ret; @@ -435,7 +437,8 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) if (!dd) return -EINVAL; - if (rate == omap2_get_dpll_rate(clk)) + hw_rate = (clk->recalc) ? clk->recalc(clk) : omap2_get_dpll_rate(clk); + if (rate == hw_rate) return 0; /* -- cgit v1.2.3-18-g5258 From 52a3a4d4610cfad536b8ac94b9a2f5ebfa51c06b Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 7 Oct 2011 00:53:08 -0600 Subject: ARM: OMAP4460: Clock: Adding support for 4460 specific clocks OMAP4460 specific clocks are not getting added as the cpu_is_omap44xx is choosing only OMAP4430 specific clock nodes. Changing it to add to OMAP4460 specific clocks also. This is clocks are required of temperature sensor. Signed-off-by: Vishwanath BS Signed-off-by: Keerthy Cc: paul@pwsan.com [paul@pwsan.com: updated to apply] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock44xx_data.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index c98c0a22c18..7b028ecce37 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -1398,9 +1398,9 @@ static struct clk dss_dss_clk = { }; static const struct clksel_rate div3_8to32_rates[] = { - { .div = 8, .val = 0, .flags = RATE_IN_44XX }, - { .div = 16, .val = 1, .flags = RATE_IN_44XX }, - { .div = 32, .val = 2, .flags = RATE_IN_44XX }, + { .div = 8, .val = 0, .flags = RATE_IN_4460 }, + { .div = 16, .val = 1, .flags = RATE_IN_4460 }, + { .div = 32, .val = 2, .flags = RATE_IN_4460 }, { .div = 0 }, }; @@ -3370,12 +3370,12 @@ int __init omap4xxx_clk_init(void) struct omap_clk *c; u32 cpu_clkflg; - if (cpu_is_omap44xx()) { + if (cpu_is_omap443x()) { cpu_mask = RATE_IN_4430; cpu_clkflg = CK_443X; } else if (cpu_is_omap446x()) { - cpu_mask = RATE_IN_4460; - cpu_clkflg = CK_446X; + cpu_mask = RATE_IN_4460 | RATE_IN_4430; + cpu_clkflg = CK_446X | CK_443X; } else { return 0; } -- cgit v1.2.3-18-g5258 From cf2a82d7462e8c728260ee09e46c573fab2f89cf Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Fri, 7 Oct 2011 00:53:09 -0600 Subject: ARM: OMAP4: clock: Add missing clock divider for OCP_ABE_ICLK The parent clock of the OCP_ABE_ICLK is the AESS_FCLK and the parent clock of the AESS_FCLK is the ABE_FCLK... ABE_FCLK --> AESS_FCLK --> OCP_ABE_ICLK The AESS_FCLK and OCP_ABE_ICLK clocks both have dividers which determine their operational frequency. However, the dividers for the AESS_FCLK and OCP_ABE_ICLK are controlled via a single bit, which is the CM1_ABE_AESS_CLKCTRL[24] bit. When this bit is set to 0, the AESS_FCLK divider is 1 and the OCP_ABE_ICLK divider is 2. Similarly, when this bit is set to 1, the AESS_FCLK divider is 2 and the OCP_ABE_ICLK is 1. The above relationship between the AESS_FCLK and OCP_ABE_ICLK dividers ensure that the OCP_ABE_ICLK clock is always half the frequency of the ABE_CLK... OCP_ABE_ICLK = ABE_FCLK/2 The divider for the OCP_ABE_ICLK is currently missing so add a divider that will ensure the OCP_ABE_ICLK frequency is always half the ABE_FCLK frequency. Signed-off-by: Jon Hunter Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock44xx_data.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 7b028ecce37..a145e322635 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -1195,11 +1195,25 @@ static struct clk l4_wkup_clk_mux_ck = { .recalc = &omap2_clksel_recalc, }; +static const struct clksel_rate div2_2to1_rates[] = { + { .div = 1, .val = 1, .flags = RATE_IN_4430 }, + { .div = 2, .val = 0, .flags = RATE_IN_4430 }, + { .div = 0 }, +}; + +static const struct clksel ocp_abe_iclk_div[] = { + { .parent = &aess_fclk, .rates = div2_2to1_rates }, + { .parent = NULL }, +}; + static struct clk ocp_abe_iclk = { .name = "ocp_abe_iclk", .parent = &aess_fclk, + .clksel = ocp_abe_iclk_div, + .clksel_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL, + .clksel_mask = OMAP4430_CLKSEL_AESS_FCLK_MASK, .ops = &clkops_null, - .recalc = &followparent_recalc, + .recalc = &omap2_clksel_recalc, }; static struct clk per_abe_24m_fclk = { -- cgit v1.2.3-18-g5258 From 1194d7b82486ad967db65115559e9ad50a88ba57 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Fri, 7 Oct 2011 01:44:20 -0600 Subject: ARM: OMAP3+: Update DPLL Fint range for OMAP36xx and OMAP4xxx devices The OMAP36xx and OMAP4xxx DPLLs have a different internal reference clock frequency (fint) operating range than OMAP3430. Update the dpll_test_fint() function to check for the correct frequency ranges for OMAP36xx and OMAP4xxx. For OMAP36xx and OMAP4xxx devices, DPLLs fint range is 0.5MHz to 2.5MHz for j-type DPLLs and otherwise it is 32KHz to 52MHz for all other DPLLs. Signed-off-by: Jon Hunter Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clkt_dpll.c | 51 ++++++++++++++++++++++++++++------------- 1 file changed, 35 insertions(+), 16 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index bcffee001bf..e069a9be93d 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c @@ -46,10 +46,19 @@ (DPLL_SCALE_FACTOR / DPLL_SCALE_BASE)) /* DPLL valid Fint frequency band limits - from 34xx TRM Section 4.7.6.2 */ -#define DPLL_FINT_BAND1_MIN 750000 -#define DPLL_FINT_BAND1_MAX 2100000 -#define DPLL_FINT_BAND2_MIN 7500000 -#define DPLL_FINT_BAND2_MAX 21000000 +#define OMAP3430_DPLL_FINT_BAND1_MIN 750000 +#define OMAP3430_DPLL_FINT_BAND1_MAX 2100000 +#define OMAP3430_DPLL_FINT_BAND2_MIN 7500000 +#define OMAP3430_DPLL_FINT_BAND2_MAX 21000000 + +/* + * DPLL valid Fint frequency range for OMAP36xx and OMAP4xxx. + * From device data manual section 4.3 "DPLL and DLL Specifications". + */ +#define OMAP3PLUS_DPLL_FINT_JTYPE_MIN 500000 +#define OMAP3PLUS_DPLL_FINT_JTYPE_MAX 2500000 +#define OMAP3PLUS_DPLL_FINT_MIN 32000 +#define OMAP3PLUS_DPLL_FINT_MAX 52000000 /* _dpll_test_fint() return codes */ #define DPLL_FINT_UNDERFLOW -1 @@ -71,33 +80,43 @@ static int _dpll_test_fint(struct clk *clk, u8 n) { struct dpll_data *dd; - long fint; + long fint, fint_min, fint_max; int ret = 0; dd = clk->dpll_data; /* DPLL divider must result in a valid jitter correction val */ fint = clk->parent->rate / n; - if (fint < DPLL_FINT_BAND1_MIN) { + if (cpu_is_omap24xx()) { + /* Should not be called for OMAP2, so warn if it is called */ + WARN(1, "No fint limits available for OMAP2!\n"); + return DPLL_FINT_INVALID; + } else if (cpu_is_omap3430()) { + fint_min = OMAP3430_DPLL_FINT_BAND1_MIN; + fint_max = OMAP3430_DPLL_FINT_BAND2_MAX; + } else if (dd->flags & DPLL_J_TYPE) { + fint_min = OMAP3PLUS_DPLL_FINT_JTYPE_MIN; + fint_max = OMAP3PLUS_DPLL_FINT_JTYPE_MAX; + } else { + fint_min = OMAP3PLUS_DPLL_FINT_MIN; + fint_max = OMAP3PLUS_DPLL_FINT_MAX; + } + + if (fint < fint_min) { pr_debug("rejecting n=%d due to Fint failure, " "lowering max_divider\n", n); dd->max_divider = n; ret = DPLL_FINT_UNDERFLOW; - - } else if (fint > DPLL_FINT_BAND1_MAX && - fint < DPLL_FINT_BAND2_MIN) { - - pr_debug("rejecting n=%d due to Fint failure\n", n); - ret = DPLL_FINT_INVALID; - - } else if (fint > DPLL_FINT_BAND2_MAX) { - + } else if (fint > fint_max) { pr_debug("rejecting n=%d due to Fint failure, " "boosting min_divider\n", n); dd->min_divider = n; ret = DPLL_FINT_INVALID; - + } else if (cpu_is_omap3430() && fint > OMAP3430_DPLL_FINT_BAND1_MAX && + fint < OMAP3430_DPLL_FINT_BAND2_MIN) { + pr_debug("rejecting n=%d due to Fint failure\n", n); + ret = DPLL_FINT_INVALID; } return ret; -- cgit v1.2.3-18-g5258 From 46f8c3c7e95c0d30d95911e7975ddc4f93b3e237 Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Fri, 7 Oct 2011 03:08:44 -0600 Subject: ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fields Fix the shift and mask macros for DSIx_PPID fields in CONTROL_DSIPHY. The OMAP4430 Public TRM vV has these fields mentioned correctly. Signed-off-by: Archit Taneja Acked-by: Benoit Cousson Acked-by: Santosh Shilimkar Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h index c88420de115..1e2d3322f33 100644 --- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h +++ b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h @@ -941,10 +941,10 @@ #define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29) #define OMAP4_DSI1_LANEENABLE_SHIFT 24 #define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24) -#define OMAP4_DSI1_PIPD_SHIFT 19 -#define OMAP4_DSI1_PIPD_MASK (0x1f << 19) -#define OMAP4_DSI2_PIPD_SHIFT 14 -#define OMAP4_DSI2_PIPD_MASK (0x1f << 14) +#define OMAP4_DSI2_PIPD_SHIFT 19 +#define OMAP4_DSI2_PIPD_MASK (0x1f << 19) +#define OMAP4_DSI1_PIPD_SHIFT 14 +#define OMAP4_DSI1_PIPD_MASK (0x1f << 14) /* CONTROL_MCBSPLP */ #define OMAP4_ALBCTRLRX_FSX_SHIFT 31 -- cgit v1.2.3-18-g5258 From 7e89098cd63a188932043258d54688e965750e2c Mon Sep 17 00:00:00 2001 From: Abhilash K V Date: Fri, 7 Oct 2011 03:08:56 -0600 Subject: ARM: OMAP: AM35x: remove hwmods that aren't generic Removing modules iva, sr1_hwmod, sr2_hwmod, mailbox from the base omap3xxx_hwmods list, so that they can be excluded for am35x. This removes quite a few warnings on boot for AM35x. Signed-off-by: Abhilash K V [paul@pwsan.com: dropped 'mailbox class' comments; updated changelog] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index ab35acbc2d1..ac12cd5fb07 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -3132,7 +3132,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_mmc2_hwmod, &omap3xxx_mmc3_hwmod, &omap3xxx_mpu_hwmod, - &omap3xxx_iva_hwmod, &omap3xxx_timer1_hwmod, &omap3xxx_timer2_hwmod, @@ -3161,8 +3160,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_i2c1_hwmod, &omap3xxx_i2c2_hwmod, &omap3xxx_i2c3_hwmod, - &omap34xx_sr1_hwmod, - &omap34xx_sr2_hwmod, /* gpio class */ &omap3xxx_gpio1_hwmod, @@ -3184,8 +3181,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_mcbsp2_sidetone_hwmod, &omap3xxx_mcbsp3_sidetone_hwmod, - /* mailbox class */ - &omap3xxx_mailbox_hwmod, /* mcspi class */ &omap34xx_mcspi1, @@ -3198,31 +3193,39 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { /* 3430ES1-only hwmods */ static __initdata struct omap_hwmod *omap3430es1_hwmods[] = { + &omap3xxx_iva_hwmod, &omap3430es1_dss_core_hwmod, + &omap3xxx_mailbox_hwmod, NULL }; /* 3430ES2+-only hwmods */ static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = { + &omap3xxx_iva_hwmod, &omap3xxx_dss_core_hwmod, &omap3xxx_usbhsotg_hwmod, + &omap3xxx_mailbox_hwmod, NULL }; /* 34xx-only hwmods (all ES revisions) */ static __initdata struct omap_hwmod *omap34xx_hwmods[] = { + &omap3xxx_iva_hwmod, &omap34xx_sr1_hwmod, &omap34xx_sr2_hwmod, + &omap3xxx_mailbox_hwmod, NULL }; /* 36xx-only hwmods (all ES revisions) */ static __initdata struct omap_hwmod *omap36xx_hwmods[] = { + &omap3xxx_iva_hwmod, &omap3xxx_uart4_hwmod, &omap3xxx_dss_core_hwmod, &omap36xx_sr1_hwmod, &omap36xx_sr2_hwmod, &omap3xxx_usbhsotg_hwmod, + &omap3xxx_mailbox_hwmod, NULL }; -- cgit v1.2.3-18-g5258 From ff2f8e5ffb23de6e2284f31651447cb80a4c9d1b Mon Sep 17 00:00:00 2001 From: Charulatha V Date: Tue, 13 Sep 2011 18:32:37 +0530 Subject: ARM: OMAP3: PM: fix pwrdm_post_transition call sequence The context lost count is modified in omap_sram_idle() path when pwrdm_post_transition() is called. But pwrdm_post_transition() is called only after omap_gpio_resume_after_idle() is called. Correct this so that context lost count is modified before calling omap_gpio_resume_after_idle(). This would be useful when OMAP GPIO save/restore context is called by the OMAP GPIO driver itself. Signed-off-by: Charulatha V Reviewed-by: Santosh Shilimkar Acked-by: Tony Lindgren Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 7255d9bce86..1915050e940 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -363,7 +363,6 @@ void omap_sram_idle(void) printk(KERN_ERR "Invalid mpu state in sram_idle\n"); return; } - pwrdm_pre_transition(); /* NEON control */ if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON) @@ -386,6 +385,8 @@ void omap_sram_idle(void) if (!console_trylock()) goto console_still_active; + pwrdm_pre_transition(); + /* PER */ if (per_next_state < PWRDM_POWER_ON) { per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0; @@ -455,6 +456,8 @@ void omap_sram_idle(void) } omap3_intc_resume_idle(); + pwrdm_post_transition(); + /* PER */ if (per_next_state < PWRDM_POWER_ON) { per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm); @@ -478,8 +481,6 @@ console_still_active: omap3_disable_io_chain(); } - pwrdm_post_transition(); - clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]); } -- cgit v1.2.3-18-g5258 From b02b917211d50ad5dc13e49c933ef916b10e0d00 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Thu, 6 Oct 2011 17:18:45 -0600 Subject: ARM: OMAP3: PM: fix I/O wakeup and I/O chain clock control detection The way that we detect which OMAP3 chips support I/O wakeup and software I/O chain clock control is broken. Currently, I/O wakeup is marked as present for all OMAP3 SoCs other than the AM3505/3517. The TI81xx family of SoCs are at present considered to be OMAP3 SoCs, but don't support I/O wakeup. To resolve this, convert the existing blacklist approach to an explicit, whitelist support, in which only SoCs which are known to support I/O wakeup are listed. (At present, this only includes OMAP34xx, OMAP3503, OMAP3515, OMAP3525, OMAP3530, and OMAP36xx.) Also, the current code incorrectly detects the presence of a software-controllable I/O chain clock on several chips that don't support it. This results in writes to reserved bitfields, unnecessary delays, and console messages on kernels running on those chips: http://www.spinics.net/lists/linux-omap/msg58735.html Convert this test to a feature test with a chip-by-chip whitelist. Thanks to Dave Hylands for reporting this problem and doing some testing to help isolate the cause. Thanks to Steve Sakoman for catching a bug in the first version of this patch. Thanks to Russell King for comments. Signed-off-by: Paul Walmsley Cc: Dave Hylands Cc: Steve Sakoman Tested-by: Steve Sakoman Cc: Russell King - ARM Linux Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/id.c | 5 ++++- arch/arm/mach-omap2/pm34xx.c | 43 ++++++++++++++++++++++--------------------- 2 files changed, 26 insertions(+), 22 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 37efb869692..a1ccb66fbe7 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -201,8 +201,11 @@ static void __init omap3_check_features(void) OMAP3_CHECK_FEATURE(status, ISP); if (cpu_is_omap3630()) omap_features |= OMAP3_HAS_192MHZ_CLK; - if (!cpu_is_omap3505() && !cpu_is_omap3517()) + if (cpu_is_omap3430() || cpu_is_omap3630()) omap_features |= OMAP3_HAS_IO_WAKEUP; + if (cpu_is_omap3630() || omap_rev() == OMAP3430_REV_ES3_1 || + omap_rev() == OMAP3430_REV_ES3_1_2) + omap_features |= OMAP3_HAS_IO_CHAIN_CTRL; omap_features |= OMAP3_HAS_SDRC; diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 1915050e940..bfa8b8c8171 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -99,31 +99,27 @@ static void omap3_enable_io_chain(void) { int timeout = 0; - if (omap_rev() >= OMAP3430_REV_ES3_1) { - omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, - PM_WKEN); - /* Do a readback to assure write has been done */ - omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN); - - while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) & - OMAP3430_ST_IO_CHAIN_MASK)) { - timeout++; - if (timeout > 1000) { - printk(KERN_ERR "Wake up daisy chain " - "activation failed.\n"); - return; - } - omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, - WKUP_MOD, PM_WKEN); + omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, + PM_WKEN); + /* Do a readback to assure write has been done */ + omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN); + + while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) & + OMAP3430_ST_IO_CHAIN_MASK)) { + timeout++; + if (timeout > 1000) { + pr_err("Wake up daisy chain activation failed.\n"); + return; } + omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, + WKUP_MOD, PM_WKEN); } } static void omap3_disable_io_chain(void) { - if (omap_rev() >= OMAP3430_REV_ES3_1) - omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, - PM_WKEN); + omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, + PM_WKEN); } static void omap3_core_save_context(void) @@ -375,7 +371,8 @@ void omap_sram_idle(void) (per_next_state < PWRDM_POWER_ON || core_next_state < PWRDM_POWER_ON)) { omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN); - omap3_enable_io_chain(); + if (omap3_has_io_chain_ctrl()) + omap3_enable_io_chain(); } /* Block console output in case it is on one of the OMAP UARTs */ @@ -478,7 +475,8 @@ console_still_active: core_next_state < PWRDM_POWER_ON)) { omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN); - omap3_disable_io_chain(); + if (omap3_has_io_chain_ctrl()) + omap3_disable_io_chain(); } clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]); @@ -871,6 +869,9 @@ static int __init omap3_pm_init(void) if (!cpu_is_omap34xx()) return -ENODEV; + if (!omap3_has_io_chain_ctrl()) + pr_warning("PM: no software I/O chain control; some wakeups may be lost\n"); + pm_errata_configure(); /* XXX prcm_setup_regs needs to be before enabling hw -- cgit v1.2.3-18-g5258 From 3047454475adca98e30e00dfca21021a0de99d78 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Thu, 6 Oct 2011 13:43:23 -0600 Subject: ARM: OMAP3: PM: restrict erratum i443 handling to OMAP3430 only Based on the documents that I have here, there doesn't appear to be an equivalent to erratum i443 for OMAP3630, so restrict this one to OMAP34xx chips. Also, explicitly restrict this erratum to EMU and HS devices. Signed-off-by: Paul Walmsley Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index bfa8b8c8171..b2740c5e050 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -407,13 +407,14 @@ void omap_sram_idle(void) omap3_intc_prepare_idle(); /* - * On EMU/HS devices ROM code restores a SRDC value - * from scratchpad which has automatic self refresh on timeout - * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443. - * Hence store/restore the SDRC_POWER register here. - */ - if (omap_rev() >= OMAP3430_REV_ES3_0 && - omap_type() != OMAP2_DEVICE_TYPE_GP && + * On EMU/HS devices ROM code restores a SRDC value + * from scratchpad which has automatic self refresh on timeout + * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443. + * Hence store/restore the SDRC_POWER register here. + */ + if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 && + (omap_type() == OMAP2_DEVICE_TYPE_EMU || + omap_type() == OMAP2_DEVICE_TYPE_SEC) && core_next_state == PWRDM_POWER_OFF) sdrc_pwr = sdrc_read_reg(SDRC_POWER); @@ -430,8 +431,9 @@ void omap_sram_idle(void) omap34xx_do_sram_idle(save_state); /* Restore normal SDRC POWER settings */ - if (omap_rev() >= OMAP3430_REV_ES3_0 && - omap_type() != OMAP2_DEVICE_TYPE_GP && + if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 && + (omap_type() == OMAP2_DEVICE_TYPE_EMU || + omap_type() == OMAP2_DEVICE_TYPE_SEC) && core_next_state == PWRDM_POWER_OFF) sdrc_write_reg(sdrc_pwr, SDRC_POWER); -- cgit v1.2.3-18-g5258 From d44b28c49e7ab3baf280100ab86d8e7ef9204e45 Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Sun, 31 Jul 2011 10:52:44 -0400 Subject: arm: fix implicit memset/string.h usage in various arch/arm files To fix things like this: arch/arm/mach-omap2/usb-tusb6010.c:58: error: implicit declaration of function 'memset' arch/arm/kernel/leds.c:40: error: implicit declaration of function 'strcspn' arch/arm/kernel/leds.c:40: warning: incompatible implicit declaration of built-in function 'strcspn' arch/arm/kernel/leds.c:45: error: implicit declaration of function 'strncmp' arch/arm/kernel/leds.c:55: error: implicit declaration of function 'strlen' arch/arm/kernel/leds.c:55: warning: incompatible implicit declaration of built-in function 'strlen' arch/arm/mach-omap2/clockdomain.c:52: error: implicit declaration of function 'strcmp' Signed-off-by: Paul Gortmaker --- arch/arm/mach-omap2/clockdomain.c | 1 + arch/arm/mach-omap2/display.c | 1 + arch/arm/mach-omap2/gpmc-onenand.c | 1 + arch/arm/mach-omap2/usb-tusb6010.c | 1 + 4 files changed, 4 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 8f0890685d7..fe36081b0d6 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 62510ec863c..9e2179f6322 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c index d776ded9830..5cdce10d618 100644 --- a/arch/arm/mach-omap2/gpmc-onenand.c +++ b/arch/arm/mach-omap2/gpmc-onenand.c @@ -10,6 +10,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index 8dd26b765b7..11760d2e290 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c @@ -8,6 +8,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include -- cgit v1.2.3-18-g5258 From dc28094b905a872f8884f1f1c48ca86b3b78583a Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Sun, 31 Jul 2011 16:17:29 -0400 Subject: arm: Add export.h to ARM specific files as required. These files all make use of one of the EXPORT_SYMBOL variants or the THIS_MODULE macro. So they will need Signed-off-by: Paul Gortmaker --- arch/arm/mach-omap2/board-omap3evm.c | 1 + arch/arm/mach-omap2/pm.c | 1 + arch/arm/mach-omap2/prcm.c | 1 + arch/arm/mach-omap2/usb-tusb6010.c | 1 + arch/arm/mach-omap2/voltage.c | 1 + 5 files changed, 5 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 0d5a9e46a6a..614384f3a6c 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 472bf22d5e8..85eef16af22 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 2e40a5cf016..4020ba53fe3 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index 11760d2e290..994d8f591a1 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c @@ -14,6 +14,7 @@ #include #include #include +#include #include diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 9ef3789ded4..e964cfd3a3d 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include -- cgit v1.2.3-18-g5258 From c4e2d2457afd6da3ddee18c2a1befca287e029c7 Mon Sep 17 00:00:00 2001 From: Sanjeev Premi Date: Thu, 13 Oct 2011 21:44:10 +0530 Subject: ARM: OMAP: Fix errors and warnings when building for one board When customizing omap2plus_defconfig to build for only one board (omap3evm), I came across these warnings and errors (filenames truncated): arch/arm/mach-omap2/board-generic.c:76:20: warning: 'omap4_init' defined but not used arch/arm/mach-omap2/built-in.o: In function `omap2420_init_early': arch/arm/mach-omap2/io.c:364: undefined reference to `omap2_set_globals_242x' arch/arm/mach-omap2/io.c:366: undefined reference to `omap2xxx_voltagedomains_init' arch/arm/mach-omap2/io.c:367: undefined reference to `omap242x_powerdomains_init' arch/arm/mach-omap2/io.c:368: undefined reference to `omap242x_clockdomains_init' arch/arm/mach-omap2/io.c:369: undefined reference to `omap2420_hwmod_init' arch/arm/mach-omap2/built-in.o: In function `omap2430_init_early': arch/arm/mach-omap2/io.c:376: undefined reference to `omap2_set_globals_243x' arch/arm/mach-omap2/io.c:378: undefined reference to `omap2xxx_voltagedomains_init' arch/arm/mach-omap2/io.c:379: undefined reference to `omap243x_powerdomains_init' arch/arm/mach-omap2/io.c:380: undefined reference to `omap243x_clockdomains_init' arch/arm/mach-omap2/io.c:381: undefined reference to `omap2430_hwmod_init' arch/arm/mach-omap2/built-in.o: In function `omap4430_init_early': arch/arm/mach-omap2/io.c:436: undefined reference to `omap2_set_globals_443x' arch/arm/mach-omap2/io.c:438: undefined reference to `omap44xx_voltagedomains_init' arch/arm/mach-omap2/io.c:439: undefined reference to `omap44xx_powerdomains_init' arch/arm/mach-omap2/io.c:440: undefined reference to `omap44xx_clockdomains_init' arch/arm/mach-omap2/io.c:441: undefined reference to `omap44xx_hwmod_init' This patch fixes them. Signed-off-by: Sanjeev Premi Acked-by: Thomas Weber [tony@atomide.com: updated to fix warnings for board-generic.c] Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 8 ++++++++ arch/arm/mach-omap2/io.c | 6 ++++++ 2 files changed, 14 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 0cc9094e5ee..fb55fa3dad5 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -28,6 +28,7 @@ * XXX: Still needed to boot until the i2c & twl driver is adapted to * device-tree */ +#ifdef CONFIG_ARCH_OMAP4 static struct twl4030_platform_data sdp4430_twldata = { .irq_base = TWL6030_IRQ_BASE, .irq_end = TWL6030_IRQ_END, @@ -37,7 +38,9 @@ static void __init omap4_i2c_init(void) { omap4_pmic_init("twl6030", &sdp4430_twldata); } +#endif +#ifdef CONFIG_ARCH_OMAP3 static struct twl4030_platform_data beagle_twldata = { .irq_base = TWL4030_IRQ_BASE, .irq_end = TWL4030_IRQ_END, @@ -47,6 +50,7 @@ static void __init omap3_i2c_init(void) { omap3_pmic_init("twl4030", &beagle_twldata); } +#endif static struct of_device_id omap_dt_match_table[] __initdata = { { .compatible = "simple-bus", }, @@ -72,17 +76,21 @@ static void __init omap_generic_init(void) of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); } +#ifdef CONFIG_ARCH_OMAP4 static void __init omap4_init(void) { omap4_i2c_init(); omap_generic_init(); } +#endif +#ifdef CONFIG_ARCH_OMAP3 static void __init omap3_init(void) { omap3_i2c_init(); omap_generic_init(); } +#endif #if defined(CONFIG_SOC_OMAP2420) static const char *omap242x_boards_compat[] __initdata = { diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index a5d8dce2a70..25d20ced03e 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -359,6 +359,7 @@ static void __init omap_hwmod_init_postsetup(void) omap_pm_if_early_init(); } +#ifdef CONFIG_ARCH_OMAP2 void __init omap2420_init_early(void) { omap2_set_globals_242x(); @@ -382,11 +383,13 @@ void __init omap2430_init_early(void) omap_hwmod_init_postsetup(); omap2430_clk_init(); } +#endif /* * Currently only board-omap3beagle.c should call this because of the * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT. */ +#ifdef CONFIG_ARCH_OMAP3 void __init omap3_init_early(void) { omap2_set_globals_3xxx(); @@ -430,7 +433,9 @@ void __init ti816x_init_early(void) omap_hwmod_init_postsetup(); omap3xxx_clk_init(); } +#endif +#ifdef CONFIG_ARCH_OMAP4 void __init omap4430_init_early(void) { omap2_set_globals_443x(); @@ -442,6 +447,7 @@ void __init omap4430_init_early(void) omap_hwmod_init_postsetup(); omap4xxx_clk_init(); } +#endif void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) -- cgit v1.2.3-18-g5258 From 927dbbb22c54347a0ba3a4eab2cbc46260afad32 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Thu, 3 Nov 2011 10:41:22 +0200 Subject: ARM: OMAP2+: devices: Fixes for McPDM Commit f718e2c034bf6ff872106344935006230764cb12 (ARM: OMAP2+: devices: Remove all omap_device_pm_latency structures) removed these structures. Commit 3528c58eb9e818b7821501afa2916eb12131994a (OMAP: omap_device: when building return platform_device instead of omap_device) now returns platform_device instead of omap_device. Fix up the omap-mcpdm init function since this part comes via sound tree, and there has been changes regarding to hwmod/omap_device_build. Signed-off-by: Peter Ujfalusi CC: Benoit Cousson CC: Kevin Hilman [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/devices.c | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 68ec03152d5..c15cfada5f1 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -318,18 +318,10 @@ static inline void omap_init_audio(void) {} #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \ defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE) -static struct omap_device_pm_latency omap_mcpdm_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static void omap_init_mcpdm(void) { struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; oh = omap_hwmod_lookup("mcpdm"); if (!oh) { @@ -337,11 +329,8 @@ static void omap_init_mcpdm(void) return; } - od = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, - omap_mcpdm_latency, - ARRAY_SIZE(omap_mcpdm_latency), 0); - if (IS_ERR(od)) - printk(KERN_ERR "Could not build omap_device for omap-mcpdm-dai\n"); + pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0); + WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n"); } #else static inline void omap_init_mcpdm(void) {} -- cgit v1.2.3-18-g5258 From d4fc7eb5c597c65739faa776783b2e28bf0d7296 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Wed, 2 Nov 2011 09:40:11 +0800 Subject: ARM: OMAP2+: l3-noc: Include linux/module.h Include linux/module.h to fix below build error: CC arch/arm/mach-omap2/omap_l3_noc.o arch/arm/mach-omap2/omap_l3_noc.c:240: error: expected ',' or ';' before 'MODULE_DEVICE_TABLE' arch/arm/mach-omap2/omap_l3_noc.c:250: error: 'THIS_MODULE' undeclared here (not in a function) make[1]: *** [arch/arm/mach-omap2/omap_l3_noc.o] Error 1 make: *** [arch/arm/mach-omap2] Error 2 Signed-off-by: Axel Lin Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_l3_noc.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c index c8b1bef92e5..6a66aa5e2a5 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.c +++ b/arch/arm/mach-omap2/omap_l3_noc.c @@ -20,6 +20,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 * USA */ +#include #include #include #include -- cgit v1.2.3-18-g5258 From ace9021698ef7d298e6d184ae2880b1cb3ebc4c7 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Thu, 6 Oct 2011 14:39:28 -0600 Subject: ARM: OMAP3: hwmod: fix variant registration and remove SmartReflex from common list Commit d6504acd2125984c61dce24727dd3842d0144015 ("OMAP2+: hwmod: remove OMAP_CHIP*") tests the inverse condition of what it should be testing for the return value from omap_hwmod_register(). This causes several IP blocks to not be registered on several OMAP3 family devices. Fixing that bug also unmasked another bug, originally reported by Chase Maupin and then subsequently by Abhilash K V , which caused SmartReflex IP blocks to be registered on SoCs that don't support them. Thanks to Russell King - ARM Linux for comments on a previous version of the patch. Signed-off-by: Paul Walmsley Cc: Chase Maupin Cc: Abhilash K V Cc: Russell King - ARM Linux Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 87a3b01d254..bc9035ec87f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -3270,7 +3270,7 @@ int __init omap3xxx_hwmod_init(void) /* Register hwmods common to all OMAP3 */ r = omap_hwmod_register(omap3xxx_hwmods); - if (!r) + if (r < 0) return r; rev = omap_rev(); @@ -3295,7 +3295,7 @@ int __init omap3xxx_hwmod_init(void) }; r = omap_hwmod_register(h); - if (!r) + if (r < 0) return r; /* -- cgit v1.2.3-18-g5258 From ff2beb1d9f2fecc3f5c1d67bfec1183a5a476586 Mon Sep 17 00:00:00 2001 From: Balaji T K Date: Mon, 3 Oct 2011 17:52:50 +0530 Subject: ARM: OMAP4: hsmmc: Fix Pbias configuration on regulator OFF MMC1 data line IO's are powered down in before set regulator function. IO's should not be powered ON when regulator is OFF. Keep the IO's in power pown mode after regulator OFF otherwise VMODE_ERROR interrupt is generated due to mismatch in input (regulator) voltage and MMC IO drive voltage. Delete incorrect comments which are not applicable for OMAP4. Signed-off-by: Balaji T K Signed-off-by: Kishore Kadiyala Reported-by: Viswanath Puttagunta Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/hsmmc.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index 77085847e4e..d663649f692 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -129,15 +129,11 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot, * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the * card with Vcc regulator (from twl4030 or whatever). OMAP has both * 1.8V and 3.0V modes, controlled by the PBIAS register. - * - * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which - * is most naturally TWL VSIM; those pins also use PBIAS. - * - * FIXME handle VMMC1A as needed ... */ reg = omap4_ctrl_pad_readl(control_pbias_offset); reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK | - OMAP4_MMC1_PWRDNZ_MASK); + OMAP4_MMC1_PWRDNZ_MASK | + OMAP4_MMC1_PBIASLITE_VMODE_MASK); omap4_ctrl_pad_writel(reg, control_pbias_offset); } @@ -172,12 +168,6 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot, reg &= ~(OMAP4_MMC1_PWRDNZ_MASK); omap4_ctrl_pad_writel(reg, control_pbias_offset); } - } else { - reg = omap4_ctrl_pad_readl(control_pbias_offset); - reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK | - OMAP4_MMC1_PWRDNZ_MASK | - OMAP4_MMC1_PBIASLITE_VMODE_MASK); - omap4_ctrl_pad_writel(reg, control_pbias_offset); } } -- cgit v1.2.3-18-g5258 From c862dd706759c48a8a45af140330544724f170f9 Mon Sep 17 00:00:00 2001 From: Balaji T K Date: Mon, 3 Oct 2011 17:52:51 +0530 Subject: ARM: OMAP4: hsmmc: configure SDMMC1_DR0 properly Fix the typo, instead it should be SDMMC1 USBC1 is not related to MMC1 I/Os Signed-off-by: Balaji T K Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/hsmmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index d663649f692..f4a1020559a 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -479,7 +479,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK); reg &= ~(OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK | OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK); - reg |= (OMAP4_USBC1_DR0_SPEEDCTRL_MASK| + reg |= (OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK | OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK | OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK); omap4_ctrl_pad_writel(reg, control_mmc1); -- cgit v1.2.3-18-g5258 From fc01387302c01899e3cc67d3c81fd4287db9bab9 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Thu, 9 Jun 2011 16:56:23 +0300 Subject: ARM: OMAP: change get_context_loss_count ret value to int get_context_loss_count functions return context loss count as u32, and zero means an error. However, zero is also returned when context has never been lost and could also be returned when the context loss count has wrapped and goes to zero. Change the functions to return an int, with negative value meaning an error. OMAP HSMMC code uses omap_pm_get_dev_context_loss_count(), but as the hsmmc code handles the returned value as an int, with negative value meaning an error, this patch actually fixes hsmmc code also. Signed-off-by: Tomi Valkeinen Acked-by: Kevin Hilman Acked-by: Paul Walmsley [tony@atomide.com: updated to fix a warning with recent dmtimer changes] Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod.c | 2 +- arch/arm/mach-omap2/powerdomain.c | 14 ++++++++++---- arch/arm/mach-omap2/powerdomain.h | 2 +- 3 files changed, 12 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index d7138070508..6b3088db83b 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -2625,7 +2625,7 @@ ohsps_unlock: * Returns the context loss count of the powerdomain assocated with @oh * upon success, or zero if no powerdomain exists for @oh. */ -u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh) +int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh) { struct powerdomain *pwrdm; int ret = 0; diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 5164d587ef5..8a18d1bd61c 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -1002,16 +1002,16 @@ int pwrdm_post_transition(void) * @pwrdm: struct powerdomain * to wait for * * Context loss count is the sum of powerdomain off-mode counter, the - * logic off counter and the per-bank memory off counter. Returns 0 + * logic off counter and the per-bank memory off counter. Returns negative * (and WARNs) upon error, otherwise, returns the context loss count. */ -u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm) +int pwrdm_get_context_loss_count(struct powerdomain *pwrdm) { int i, count; if (!pwrdm) { WARN(1, "powerdomain: %s: pwrdm is null\n", __func__); - return 0; + return -ENODEV; } count = pwrdm->state_counter[PWRDM_POWER_OFF]; @@ -1020,7 +1020,13 @@ u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm) for (i = 0; i < pwrdm->banks; i++) count += pwrdm->ret_mem_off_counter[i]; - pr_debug("powerdomain: %s: context loss count = %u\n", + /* + * Context loss count has to be a non-negative value. Clear the sign + * bit to get a value range from 0 to INT_MAX. + */ + count &= INT_MAX; + + pr_debug("powerdomain: %s: context loss count = %d\n", pwrdm->name, count); return count; diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index 42e6dd8f2a7..0d72a8a8ce4 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h @@ -217,7 +217,7 @@ int pwrdm_clkdm_state_switch(struct clockdomain *clkdm); int pwrdm_pre_transition(void); int pwrdm_post_transition(void); int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm); -u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm); +int pwrdm_get_context_loss_count(struct powerdomain *pwrdm); bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm); extern void omap242x_powerdomains_init(void); -- cgit v1.2.3-18-g5258 From 0eb3c0f5a43f7dd90c4109927752659f147237b7 Mon Sep 17 00:00:00 2001 From: Bjarne Steinsbo Date: Thu, 6 Oct 2011 13:03:46 -0700 Subject: ARM: OMAP: usb: musb: OMAP: Delete unused function Not in use anymore. Signed-off-by: Bjarne Steinsbo Acked-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/usb-musb.c | 38 -------------------------------------- 1 file changed, 38 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index 47fb5d60763..267975086a7 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c @@ -60,44 +60,6 @@ static struct musb_hdrc_platform_data musb_plat = { static u64 musb_dmamask = DMA_BIT_MASK(32); -static void usb_musb_mux_init(struct omap_musb_board_data *board_data) -{ - switch (board_data->interface_type) { - case MUSB_INTERFACE_UTMI: - omap_mux_init_signal("usba0_otg_dp", OMAP_PIN_INPUT); - omap_mux_init_signal("usba0_otg_dm", OMAP_PIN_INPUT); - break; - case MUSB_INTERFACE_ULPI: - omap_mux_init_signal("usba0_ulpiphy_clk", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("usba0_ulpiphy_stp", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("usba0_ulpiphy_dir", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("usba0_ulpiphy_nxt", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("usba0_ulpiphy_dat0", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("usba0_ulpiphy_dat1", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("usba0_ulpiphy_dat2", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("usba0_ulpiphy_dat3", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("usba0_ulpiphy_dat4", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("usba0_ulpiphy_dat5", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("usba0_ulpiphy_dat6", - OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_signal("usba0_ulpiphy_dat7", - OMAP_PIN_INPUT_PULLDOWN); - break; - default: - break; - } -} - static struct omap_musb_board_data musb_default_board_data = { .interface_type = MUSB_INTERFACE_ULPI, .mode = MUSB_OTG, -- cgit v1.2.3-18-g5258 From e9614f35ba0f50d985fc27cbbafcb0346e1d4daa Mon Sep 17 00:00:00 2001 From: Thomas Weber Date: Tue, 6 Sep 2011 17:11:49 +0200 Subject: ARM: OMAP: Devkit8000: Remove double omap_mux_init_gpio Remove the init of card detect pin because omap_mux_init_gpio() is called during hsmmc initialization for the write protect and card detect pin. Signed-off-by: Thomas Weber Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-devkit8000.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 42918940c53..90154e411da 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -226,7 +226,6 @@ static int devkit8000_twl_gpio_setup(struct device *dev, { int ret; - omap_mux_init_gpio(29, OMAP_PIN_INPUT); /* gpio + 0 is "mmc0_cd" (input/IRQ) */ mmc[0].gpio_cd = gpio + 0; omap2_hsmmc_init(mmc); -- cgit v1.2.3-18-g5258 From 2847111cb1ea1a6e2b25e6a26cc76f88575bc0bd Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 4 Oct 2011 23:20:40 +0200 Subject: ARM: OMAP2+: clock data: Remove redundant timer clkdev The commit 318c3e15cd55c73a26ae22a65a8183655b3003f9 added some "fck" clock alias to timer devices that are not needed anymore since hwmod framework will create them automatically. A warning was added to highlight and thus fix the redundancy. [ 0.616424] omap_timer.1: alias fck already exists [ 0.621948] omap_timer.2: alias fck already exists [ 0.627380] omap_timer.3: alias fck already exists [ 0.632781] omap_timer.4: alias fck already exists [ 0.638214] omap_timer.5: alias fck already exists [ 0.643615] omap_timer.6: alias fck already exists [ 0.649078] omap_timer.7: alias fck already exists [ 0.654479] omap_timer.8: alias fck already exists [ 0.659881] omap_timer.9: alias fck already exists [ 0.665283] omap_timer.10: alias fck already exists [ 0.670776] omap_timer.11: alias fck already exists Remove all the clkdev entries for timer fck alias. Signed-off-by: Benoit Cousson Cc: Tarun Kanti DebBarma Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock2420_data.c | 12 ------------ arch/arm/mach-omap2/clock2430_data.c | 12 ------------ arch/arm/mach-omap2/clock3xxx_data.c | 12 ------------ arch/arm/mach-omap2/clock44xx_data.c | 11 ----------- 4 files changed, 47 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index 14a6277dd18..61ad3855f10 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -1898,18 +1898,6 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "pka_ick", &pka_ick, CK_242X), CLK(NULL, "usb_fck", &usb_fck, CK_242X), CLK("musb-hdrc", "fck", &osc_ck, CK_242X), - CLK("omap_timer.1", "fck", &gpt1_fck, CK_242X), - CLK("omap_timer.2", "fck", &gpt2_fck, CK_242X), - CLK("omap_timer.3", "fck", &gpt3_fck, CK_242X), - CLK("omap_timer.4", "fck", &gpt4_fck, CK_242X), - CLK("omap_timer.5", "fck", &gpt5_fck, CK_242X), - CLK("omap_timer.6", "fck", &gpt6_fck, CK_242X), - CLK("omap_timer.7", "fck", &gpt7_fck, CK_242X), - CLK("omap_timer.8", "fck", &gpt8_fck, CK_242X), - CLK("omap_timer.9", "fck", &gpt9_fck, CK_242X), - CLK("omap_timer.10", "fck", &gpt10_fck, CK_242X), - CLK("omap_timer.11", "fck", &gpt11_fck, CK_242X), - CLK("omap_timer.12", "fck", &gpt12_fck, CK_242X), CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index ea6717cfa3c..0cc12879e7b 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c @@ -1998,18 +1998,6 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X), CLK("omap_hsmmc.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X), CLK("omap_hsmmc.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X), - CLK("omap_timer.1", "fck", &gpt1_fck, CK_243X), - CLK("omap_timer.2", "fck", &gpt2_fck, CK_243X), - CLK("omap_timer.3", "fck", &gpt3_fck, CK_243X), - CLK("omap_timer.4", "fck", &gpt4_fck, CK_243X), - CLK("omap_timer.5", "fck", &gpt5_fck, CK_243X), - CLK("omap_timer.6", "fck", &gpt6_fck, CK_243X), - CLK("omap_timer.7", "fck", &gpt7_fck, CK_243X), - CLK("omap_timer.8", "fck", &gpt8_fck, CK_243X), - CLK("omap_timer.9", "fck", &gpt9_fck, CK_243X), - CLK("omap_timer.10", "fck", &gpt10_fck, CK_243X), - CLK("omap_timer.11", "fck", &gpt11_fck, CK_243X), - CLK("omap_timer.12", "fck", &gpt12_fck, CK_243X), CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 65dd363163b..5d0064a4fb5 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -3464,18 +3464,6 @@ static struct omap_clk omap3xxx_clks[] = { CLK("musb-am35x", "fck", &hsotgusb_fck_am35xx, CK_AM35XX), CLK(NULL, "hecc_ck", &hecc_ck, CK_AM35XX), CLK(NULL, "uart4_ick", &uart4_ick_am35xx, CK_AM35XX), - CLK("omap_timer.1", "fck", &gpt1_fck, CK_3XXX), - CLK("omap_timer.2", "fck", &gpt2_fck, CK_3XXX), - CLK("omap_timer.3", "fck", &gpt3_fck, CK_3XXX), - CLK("omap_timer.4", "fck", &gpt4_fck, CK_3XXX), - CLK("omap_timer.5", "fck", &gpt5_fck, CK_3XXX), - CLK("omap_timer.6", "fck", &gpt6_fck, CK_3XXX), - CLK("omap_timer.7", "fck", &gpt7_fck, CK_3XXX), - CLK("omap_timer.8", "fck", &gpt8_fck, CK_3XXX), - CLK("omap_timer.9", "fck", &gpt9_fck, CK_3XXX), - CLK("omap_timer.10", "fck", &gpt10_fck, CK_3XXX), - CLK("omap_timer.11", "fck", &gpt11_fck, CK_3XXX), - CLK("omap_timer.12", "fck", &gpt12_fck, CK_3XXX), CLK("omap_timer.1", "32k_ck", &omap_32k_fck, CK_3XXX), CLK("omap_timer.2", "32k_ck", &omap_32k_fck, CK_3XXX), CLK("omap_timer.3", "32k_ck", &omap_32k_fck, CK_3XXX), diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index cbf9b68d4b9..0798a802497 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3377,17 +3377,6 @@ static struct omap_clk omap44xx_clks[] = { CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), CLK("omap_wdt", "ick", &dummy_ck, CK_443X), - CLK("omap_timer.1", "fck", &timer1_fck, CK_443X), - CLK("omap_timer.2", "fck", &timer2_fck, CK_443X), - CLK("omap_timer.3", "fck", &timer3_fck, CK_443X), - CLK("omap_timer.4", "fck", &timer4_fck, CK_443X), - CLK("omap_timer.5", "fck", &timer5_fck, CK_443X), - CLK("omap_timer.6", "fck", &timer6_fck, CK_443X), - CLK("omap_timer.7", "fck", &timer7_fck, CK_443X), - CLK("omap_timer.8", "fck", &timer8_fck, CK_443X), - CLK("omap_timer.9", "fck", &timer9_fck, CK_443X), - CLK("omap_timer.10", "fck", &timer10_fck, CK_443X), - CLK("omap_timer.11", "fck", &timer11_fck, CK_443X), CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X), CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X), CLK("omap_timer.3", "32k_ck", &sys_32k_ck, CK_443X), -- cgit v1.2.3-18-g5258 From c16ae1e64e292054bc4c5a20724b40217bdc43dd Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 4 Oct 2011 23:20:41 +0200 Subject: ARM: OMAP2+: timer: Remove omap_device_pm_latency Remove the structure since a default one is now available. Signed-off-by: Benoit Cousson Cc: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/timer.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index e49fc7be222..037b0d7d4e0 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -408,14 +408,6 @@ static int omap2_dm_timer_set_src(struct platform_device *pdev, int source) return ret; } -struct omap_device_pm_latency omap2_dmtimer_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - /** * omap_timer_init - build and register timer device with an * associated timer hwmod @@ -477,9 +469,7 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; #endif pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata), - omap2_dmtimer_latency, - ARRAY_SIZE(omap2_dmtimer_latency), - 0); + NULL, 0, 0); if (IS_ERR(pdev)) { pr_err("%s: Can't build omap_device for %s: %s.\n", -- cgit v1.2.3-18-g5258 From 41eb2d813f558900884e240c2f723e36c7bd151f Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 6 Oct 2011 15:43:00 -0700 Subject: ARM: OMAP2: Fix H4 matrix keyboard warning Convert to use matrix keyboard to remove the warning "Please update the board to use matrix-keypad driver". Based on similar setup in palmtc.c. Note that this patch is compile tested only because of lack of working hardware. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-h4.c | 122 +++++++++++++++++++++++------------------ 1 file changed, 69 insertions(+), 53 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index c12666ee701..8b351d92a1c 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -34,7 +35,6 @@ #include #include #include -#include #include #include #include @@ -50,10 +50,8 @@ #define H4_ETHR_GPIO_IRQ 92 -static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 }; -static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 }; - -static const unsigned int h4_keymap[] = { +#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE) +static const uint32_t board_matrix_keys[] = { KEY(0, 0, KEY_LEFT), KEY(1, 0, KEY_RIGHT), KEY(2, 0, KEY_A), @@ -86,6 +84,71 @@ static const unsigned int h4_keymap[] = { KEY(4, 5, KEY_ENTER), }; +static const struct matrix_keymap_data board_keymap_data = { + .keymap = board_matrix_keys, + .keymap_size = ARRAY_SIZE(board_matrix_keys), +}; + +static unsigned int board_keypad_row_gpios[] = { + 88, 89, 124, 11, 6, 96 +}; + +static unsigned int board_keypad_col_gpios[] = { + 90, 91, 100, 36, 12, 97, 98 +}; + +static struct matrix_keypad_platform_data board_keypad_platform_data = { + .keymap_data = &board_keymap_data, + .row_gpios = board_keypad_row_gpios, + .num_row_gpios = ARRAY_SIZE(board_keypad_row_gpios), + .col_gpios = board_keypad_col_gpios, + .num_col_gpios = ARRAY_SIZE(board_keypad_col_gpios), + .active_low = 1, + + .debounce_ms = 20, + .col_scan_delay_us = 5, +}; + +static struct platform_device board_keyboard = { + .name = "matrix-keypad", + .id = -1, + .dev = { + .platform_data = &board_keypad_platform_data, + }, +}; +static void __init board_mkp_init(void) +{ + omap_mux_init_gpio(88, OMAP_PULL_ENA | OMAP_PULL_UP); + omap_mux_init_gpio(89, OMAP_PULL_ENA | OMAP_PULL_UP); + omap_mux_init_gpio(124, OMAP_PULL_ENA | OMAP_PULL_UP); + omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA | OMAP_PULL_UP); + if (omap_has_menelaus()) { + omap_mux_init_signal("sdrc_a14.gpio0", + OMAP_PULL_ENA | OMAP_PULL_UP); + omap_mux_init_signal("vlynq_rx0.gpio_15", 0); + omap_mux_init_signal("gpio_98", 0); + board_keypad_row_gpios[5] = 0; + board_keypad_col_gpios[2] = 15; + board_keypad_col_gpios[6] = 18; + } else { + omap_mux_init_signal("gpio_96", OMAP_PULL_ENA | OMAP_PULL_UP); + omap_mux_init_signal("gpio_100", 0); + omap_mux_init_signal("gpio_98", 0); + } + omap_mux_init_signal("gpio_90", 0); + omap_mux_init_signal("gpio_91", 0); + omap_mux_init_signal("gpio_36", 0); + omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0); + omap_mux_init_signal("gpio_97", 0); + + platform_device_register(&board_keyboard); +} +#else +static inline void board_mkp_init(void) +{ +} +#endif + static struct mtd_partition h4_partitions[] = { /* bootloader (U-Boot, etc) in first sector */ { @@ -137,31 +200,8 @@ static struct platform_device h4_flash_device = { .resource = &h4_flash_resource, }; -static const struct matrix_keymap_data h4_keymap_data = { - .keymap = h4_keymap, - .keymap_size = ARRAY_SIZE(h4_keymap), -}; - -static struct omap_kp_platform_data h4_kp_data = { - .rows = 6, - .cols = 7, - .keymap_data = &h4_keymap_data, - .rep = true, - .row_gpios = row_gpios, - .col_gpios = col_gpios, -}; - -static struct platform_device h4_kp_device = { - .name = "omap-keypad", - .id = -1, - .dev = { - .platform_data = &h4_kp_data, - }, -}; - static struct platform_device *h4_devices[] __initdata = { &h4_flash_device, - &h4_kp_device, }; static struct panel_generic_dpi_data h4_panel_data = { @@ -336,31 +376,7 @@ static void __init omap_h4_init(void) * if not needed. */ -#if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE) - omap_mux_init_gpio(88, OMAP_PULL_ENA | OMAP_PULL_UP); - omap_mux_init_gpio(89, OMAP_PULL_ENA | OMAP_PULL_UP); - omap_mux_init_gpio(124, OMAP_PULL_ENA | OMAP_PULL_UP); - omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA | OMAP_PULL_UP); - if (omap_has_menelaus()) { - omap_mux_init_signal("sdrc_a14.gpio0", - OMAP_PULL_ENA | OMAP_PULL_UP); - omap_mux_init_signal("vlynq_rx0.gpio_15", 0); - omap_mux_init_signal("gpio_98", 0); - row_gpios[5] = 0; - col_gpios[2] = 15; - col_gpios[6] = 18; - } else { - omap_mux_init_signal("gpio_96", OMAP_PULL_ENA | OMAP_PULL_UP); - omap_mux_init_signal("gpio_100", 0); - omap_mux_init_signal("gpio_98", 0); - } - omap_mux_init_signal("gpio_90", 0); - omap_mux_init_signal("gpio_91", 0); - omap_mux_init_signal("gpio_36", 0); - omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0); - omap_mux_init_signal("gpio_97", 0); -#endif - + board_mkp_init(); i2c_register_board_info(1, h4_i2c_board_info, ARRAY_SIZE(h4_i2c_board_info)); -- cgit v1.2.3-18-g5258 From e978aa7d7d57d04eb5f88a7507c4fb98577def77 Mon Sep 17 00:00:00 2001 From: Deepthi Dharwar Date: Fri, 28 Oct 2011 16:20:09 +0530 Subject: cpuidle: Move dev->last_residency update to driver enter routine; remove dev->last_state Cpuidle governor only suggests the state to enter using the governor->select() interface, but allows the low level driver to override the recommended state. The actual entered state may be different because of software or hardware demotion. Software demotion is done by the back-end cpuidle driver and can be accounted correctly. Current cpuidle code uses last_state field to capture the actual state entered and based on that updates the statistics for the state entered. Ideally the driver enter routine should update the counters, and it should return the state actually entered rather than the time spent there. The generic cpuidle code should simply handle where the counters live in the sysfs namespace, not updating the counters. Reference: https://lkml.org/lkml/2011/3/25/52 Signed-off-by: Deepthi Dharwar Signed-off-by: Trinabh Gupta Tested-by: Jean Pihet Reviewed-by: Kevin Hilman Acked-by: Arjan van de Ven Acked-by: Kevin Hilman Signed-off-by: Len Brown --- arch/arm/mach-omap2/cpuidle34xx.c | 67 +++++++++++++++++++++++---------------- 1 file changed, 39 insertions(+), 28 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 4bf6e6e8b10..58425c75f1b 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -88,17 +88,19 @@ static int _cpuidle_deny_idle(struct powerdomain *pwrdm, /** * omap3_enter_idle - Programs OMAP3 to enter the specified state * @dev: cpuidle device - * @state: The target state to be programmed + * @index: the index of state to be entered * * Called from the CPUidle framework to program the device to the * specified target state selected by the governor. */ static int omap3_enter_idle(struct cpuidle_device *dev, - struct cpuidle_state *state) + int index) { - struct omap3_idle_statedata *cx = cpuidle_get_statedata(state); + struct omap3_idle_statedata *cx = + cpuidle_get_statedata(&dev->states[index]); struct timespec ts_preidle, ts_postidle, ts_idle; u32 mpu_state = cx->mpu_state, core_state = cx->core_state; + int idle_time; /* Used to keep track of the total time in idle */ getnstimeofday(&ts_preidle); @@ -113,7 +115,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev, goto return_sleep_time; /* Deny idle for C1 */ - if (state == &dev->states[0]) { + if (index == 0) { pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle); pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle); } @@ -122,7 +124,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev, omap_sram_idle(); /* Re-allow idle for C1 */ - if (state == &dev->states[0]) { + if (index == 0) { pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle); pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle); } @@ -134,28 +136,35 @@ return_sleep_time: local_irq_enable(); local_fiq_enable(); - return ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * USEC_PER_SEC; + idle_time = ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * \ + USEC_PER_SEC; + + /* Update cpuidle counters */ + dev->last_residency = idle_time; + + return index; } /** * next_valid_state - Find next valid C-state * @dev: cpuidle device - * @state: Currently selected C-state + * @index: Index of currently selected c-state * - * If the current state is valid, it is returned back to the caller. - * Else, this function searches for a lower c-state which is still - * valid. + * If the state corresponding to index is valid, index is returned back + * to the caller. Else, this function searches for a lower c-state which is + * still valid (as defined in omap3_power_states[]) and returns its index. * * A state is valid if the 'valid' field is enabled and * if it satisfies the enable_off_mode condition. */ -static struct cpuidle_state *next_valid_state(struct cpuidle_device *dev, - struct cpuidle_state *curr) +static int next_valid_state(struct cpuidle_device *dev, + int index) { - struct cpuidle_state *next = NULL; + struct cpuidle_state *curr = &dev->states[index]; struct omap3_idle_statedata *cx = cpuidle_get_statedata(curr); u32 mpu_deepest_state = PWRDM_POWER_RET; u32 core_deepest_state = PWRDM_POWER_RET; + int next_index = -1; if (enable_off_mode) { mpu_deepest_state = PWRDM_POWER_OFF; @@ -172,20 +181,20 @@ static struct cpuidle_state *next_valid_state(struct cpuidle_device *dev, if ((cx->valid) && (cx->mpu_state >= mpu_deepest_state) && (cx->core_state >= core_deepest_state)) { - return curr; + return index; } else { int idx = OMAP3_NUM_STATES - 1; /* Reach the current state starting at highest C-state */ for (; idx >= 0; idx--) { if (&dev->states[idx] == curr) { - next = &dev->states[idx]; + next_index = idx; break; } } /* Should never hit this condition */ - WARN_ON(next == NULL); + WARN_ON(next_index == -1); /* * Drop to next valid state. @@ -197,37 +206,39 @@ static struct cpuidle_state *next_valid_state(struct cpuidle_device *dev, if ((cx->valid) && (cx->mpu_state >= mpu_deepest_state) && (cx->core_state >= core_deepest_state)) { - next = &dev->states[idx]; + next_index = idx; break; } } /* * C1 is always valid. - * So, no need to check for 'next==NULL' outside this loop. + * So, no need to check for 'next_index == -1' outside + * this loop. */ } - return next; + return next_index; } /** * omap3_enter_idle_bm - Checks for any bus activity * @dev: cpuidle device - * @state: The target state to be programmed + * @index: array index of target state to be programmed * * This function checks for any pending activity and then programs * the device to the specified or a safer state. */ static int omap3_enter_idle_bm(struct cpuidle_device *dev, - struct cpuidle_state *state) + int index) { - struct cpuidle_state *new_state; + struct cpuidle_state *state = &dev->states[index]; + int new_state_idx; u32 core_next_state, per_next_state = 0, per_saved_state = 0, cam_state; struct omap3_idle_statedata *cx; int ret; if (!omap3_can_sleep()) { - new_state = dev->safe_state; + new_state_idx = dev->safe_state_index; goto select_state; } @@ -237,7 +248,7 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, */ cam_state = pwrdm_read_pwrst(cam_pd); if (cam_state == PWRDM_POWER_ON) { - new_state = dev->safe_state; + new_state_idx = dev->safe_state_index; goto select_state; } @@ -264,11 +275,10 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, if (per_next_state != per_saved_state) pwrdm_set_next_pwrst(per_pd, per_next_state); - new_state = next_valid_state(dev, state); + new_state_idx = next_valid_state(dev, index); select_state: - dev->last_state = new_state; - ret = omap3_enter_idle(dev, new_state); + ret = omap3_enter_idle(dev, new_state_idx); /* Restore original PER state if it was modified */ if (per_next_state != per_saved_state) @@ -339,11 +349,12 @@ int __init omap3_idle_init(void) cpuidle_register_driver(&omap3_idle_driver); dev = &per_cpu(omap3_idle_dev, smp_processor_id()); + dev->safe_state_index = -1; /* C1 . MPU WFI + Core active */ cx = _fill_cstate(dev, 0, "MPU ON + CORE ON"); (&dev->states[0])->enter = omap3_enter_idle; - dev->safe_state = &dev->states[0]; + dev->safe_state_index = 0; cx->valid = 1; /* C1 is always valid */ cx->mpu_state = PWRDM_POWER_ON; cx->core_state = PWRDM_POWER_ON; -- cgit v1.2.3-18-g5258 From 4202735e8ab6ecfb0381631a0d0b58fefe0bd4e2 Mon Sep 17 00:00:00 2001 From: Deepthi Dharwar Date: Fri, 28 Oct 2011 16:20:33 +0530 Subject: cpuidle: Split cpuidle_state structure and move per-cpu statistics fields This is the first step towards global registration of cpuidle states. The statistics used primarily by the governor are per-cpu and have to be split from rest of the fields inside cpuidle_state, which would be made global i.e. single copy. The driver_data field is also per-cpu and moved. Signed-off-by: Deepthi Dharwar Signed-off-by: Trinabh Gupta Tested-by: Jean Pihet Reviewed-by: Kevin Hilman Acked-by: Arjan van de Ven Acked-by: Kevin Hilman Signed-off-by: Len Brown --- arch/arm/mach-omap2/cpuidle34xx.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 58425c75f1b..d3fce7b97fc 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -97,7 +97,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev, int index) { struct omap3_idle_statedata *cx = - cpuidle_get_statedata(&dev->states[index]); + cpuidle_get_statedata(&dev->states_usage[index]); struct timespec ts_preidle, ts_postidle, ts_idle; u32 mpu_state = cx->mpu_state, core_state = cx->core_state; int idle_time; @@ -160,8 +160,9 @@ return_sleep_time: static int next_valid_state(struct cpuidle_device *dev, int index) { + struct cpuidle_state_usage *curr_usage = &dev->states_usage[index]; struct cpuidle_state *curr = &dev->states[index]; - struct omap3_idle_statedata *cx = cpuidle_get_statedata(curr); + struct omap3_idle_statedata *cx = cpuidle_get_statedata(curr_usage); u32 mpu_deepest_state = PWRDM_POWER_RET; u32 core_deepest_state = PWRDM_POWER_RET; int next_index = -1; @@ -202,7 +203,7 @@ static int next_valid_state(struct cpuidle_device *dev, */ idx--; for (; idx >= 0; idx--) { - cx = cpuidle_get_statedata(&dev->states[idx]); + cx = cpuidle_get_statedata(&dev->states_usage[idx]); if ((cx->valid) && (cx->mpu_state >= mpu_deepest_state) && (cx->core_state >= core_deepest_state)) { @@ -231,7 +232,6 @@ static int next_valid_state(struct cpuidle_device *dev, static int omap3_enter_idle_bm(struct cpuidle_device *dev, int index) { - struct cpuidle_state *state = &dev->states[index]; int new_state_idx; u32 core_next_state, per_next_state = 0, per_saved_state = 0, cam_state; struct omap3_idle_statedata *cx; @@ -264,7 +264,7 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, * Prevent PER off if CORE is not in retention or off as this * would disable PER wakeups completely. */ - cx = cpuidle_get_statedata(state); + cx = cpuidle_get_statedata(&dev->states_usage[index]); core_next_state = cx->core_state; per_next_state = per_saved_state = pwrdm_read_next_pwrst(per_pd); if ((per_next_state == PWRDM_POWER_OFF) && @@ -318,6 +318,7 @@ static inline struct omap3_idle_statedata *_fill_cstate( { struct omap3_idle_statedata *cx = &omap3_idle_data[idx]; struct cpuidle_state *state = &dev->states[idx]; + struct cpuidle_state_usage *state_usage = &dev->states_usage[idx]; state->exit_latency = cpuidle_params_table[idx].exit_latency; state->target_residency = cpuidle_params_table[idx].target_residency; @@ -326,7 +327,7 @@ static inline struct omap3_idle_statedata *_fill_cstate( cx->valid = cpuidle_params_table[idx].valid; sprintf(state->name, "C%d", idx + 1); strncpy(state->desc, descr, CPUIDLE_DESC_LEN); - cpuidle_set_statedata(state, cx); + cpuidle_set_statedata(state_usage, cx); return cx; } -- cgit v1.2.3-18-g5258 From 46bcfad7a819bd17ac4e831b04405152d59784ab Mon Sep 17 00:00:00 2001 From: Deepthi Dharwar Date: Fri, 28 Oct 2011 16:20:42 +0530 Subject: cpuidle: Single/Global registration of idle states This patch makes the cpuidle_states structure global (single copy) instead of per-cpu. The statistics needed on per-cpu basis by the governor are kept per-cpu. This simplifies the cpuidle subsystem as state registration is done by single cpu only. Having single copy of cpuidle_states saves memory. Rare case of asymmetric C-states can be handled within the cpuidle driver and architectures such as POWER do not have asymmetric C-states. Having single/global registration of all the idle states, dynamic C-state transitions on x86 are handled by the boot cpu. Here, the boot cpu would disable all the devices, re-populate the states and later enable all the devices, irrespective of the cpu that would receive the notification first. Reference: https://lkml.org/lkml/2011/4/25/83 Signed-off-by: Deepthi Dharwar Signed-off-by: Trinabh Gupta Tested-by: Jean Pihet Reviewed-by: Kevin Hilman Acked-by: Arjan van de Ven Acked-by: Kevin Hilman Signed-off-by: Len Brown --- arch/arm/mach-omap2/cpuidle34xx.c | 73 ++++++++++++++++++++++++++------------- 1 file changed, 49 insertions(+), 24 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index d3fce7b97fc..1fe35c24fba 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -88,12 +88,14 @@ static int _cpuidle_deny_idle(struct powerdomain *pwrdm, /** * omap3_enter_idle - Programs OMAP3 to enter the specified state * @dev: cpuidle device + * @drv: cpuidle driver * @index: the index of state to be entered * * Called from the CPUidle framework to program the device to the * specified target state selected by the governor. */ static int omap3_enter_idle(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int index) { struct omap3_idle_statedata *cx = @@ -148,6 +150,7 @@ return_sleep_time: /** * next_valid_state - Find next valid C-state * @dev: cpuidle device + * @drv: cpuidle driver * @index: Index of currently selected c-state * * If the state corresponding to index is valid, index is returned back @@ -158,10 +161,11 @@ return_sleep_time: * if it satisfies the enable_off_mode condition. */ static int next_valid_state(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int index) { struct cpuidle_state_usage *curr_usage = &dev->states_usage[index]; - struct cpuidle_state *curr = &dev->states[index]; + struct cpuidle_state *curr = &drv->states[index]; struct omap3_idle_statedata *cx = cpuidle_get_statedata(curr_usage); u32 mpu_deepest_state = PWRDM_POWER_RET; u32 core_deepest_state = PWRDM_POWER_RET; @@ -188,7 +192,7 @@ static int next_valid_state(struct cpuidle_device *dev, /* Reach the current state starting at highest C-state */ for (; idx >= 0; idx--) { - if (&dev->states[idx] == curr) { + if (&drv->states[idx] == curr) { next_index = idx; break; } @@ -224,12 +228,14 @@ static int next_valid_state(struct cpuidle_device *dev, /** * omap3_enter_idle_bm - Checks for any bus activity * @dev: cpuidle device + * @drv: cpuidle driver * @index: array index of target state to be programmed * * This function checks for any pending activity and then programs * the device to the specified or a safer state. */ static int omap3_enter_idle_bm(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int index) { int new_state_idx; @@ -238,7 +244,7 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, int ret; if (!omap3_can_sleep()) { - new_state_idx = dev->safe_state_index; + new_state_idx = drv->safe_state_index; goto select_state; } @@ -248,7 +254,7 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, */ cam_state = pwrdm_read_pwrst(cam_pd); if (cam_state == PWRDM_POWER_ON) { - new_state_idx = dev->safe_state_index; + new_state_idx = drv->safe_state_index; goto select_state; } @@ -275,10 +281,10 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, if (per_next_state != per_saved_state) pwrdm_set_next_pwrst(per_pd, per_next_state); - new_state_idx = next_valid_state(dev, index); + new_state_idx = next_valid_state(dev, drv, index); select_state: - ret = omap3_enter_idle(dev, new_state_idx); + ret = omap3_enter_idle(dev, drv, new_state_idx); /* Restore original PER state if it was modified */ if (per_next_state != per_saved_state) @@ -311,22 +317,30 @@ struct cpuidle_driver omap3_idle_driver = { .owner = THIS_MODULE, }; -/* Helper to fill the C-state common data and register the driver_data */ -static inline struct omap3_idle_statedata *_fill_cstate( - struct cpuidle_device *dev, +/* Helper to fill the C-state common data*/ +static inline void _fill_cstate(struct cpuidle_driver *drv, int idx, const char *descr) { - struct omap3_idle_statedata *cx = &omap3_idle_data[idx]; - struct cpuidle_state *state = &dev->states[idx]; - struct cpuidle_state_usage *state_usage = &dev->states_usage[idx]; + struct cpuidle_state *state = &drv->states[idx]; state->exit_latency = cpuidle_params_table[idx].exit_latency; state->target_residency = cpuidle_params_table[idx].target_residency; state->flags = CPUIDLE_FLAG_TIME_VALID; state->enter = omap3_enter_idle_bm; - cx->valid = cpuidle_params_table[idx].valid; sprintf(state->name, "C%d", idx + 1); strncpy(state->desc, descr, CPUIDLE_DESC_LEN); + +} + +/* Helper to register the driver_data */ +static inline struct omap3_idle_statedata *_fill_cstate_usage( + struct cpuidle_device *dev, + int idx) +{ + struct omap3_idle_statedata *cx = &omap3_idle_data[idx]; + struct cpuidle_state_usage *state_usage = &dev->states_usage[idx]; + + cx->valid = cpuidle_params_table[idx].valid; cpuidle_set_statedata(state_usage, cx); return cx; @@ -341,6 +355,7 @@ static inline struct omap3_idle_statedata *_fill_cstate( int __init omap3_idle_init(void) { struct cpuidle_device *dev; + struct cpuidle_driver *drv = &omap3_idle_driver; struct omap3_idle_statedata *cx; mpu_pd = pwrdm_lookup("mpu_pwrdm"); @@ -348,45 +363,52 @@ int __init omap3_idle_init(void) per_pd = pwrdm_lookup("per_pwrdm"); cam_pd = pwrdm_lookup("cam_pwrdm"); - cpuidle_register_driver(&omap3_idle_driver); + + drv->safe_state_index = -1; dev = &per_cpu(omap3_idle_dev, smp_processor_id()); - dev->safe_state_index = -1; /* C1 . MPU WFI + Core active */ - cx = _fill_cstate(dev, 0, "MPU ON + CORE ON"); - (&dev->states[0])->enter = omap3_enter_idle; - dev->safe_state_index = 0; + _fill_cstate(drv, 0, "MPU ON + CORE ON"); + (&drv->states[0])->enter = omap3_enter_idle; + drv->safe_state_index = 0; + cx = _fill_cstate_usage(dev, 0); cx->valid = 1; /* C1 is always valid */ cx->mpu_state = PWRDM_POWER_ON; cx->core_state = PWRDM_POWER_ON; /* C2 . MPU WFI + Core inactive */ - cx = _fill_cstate(dev, 1, "MPU ON + CORE ON"); + _fill_cstate(drv, 1, "MPU ON + CORE ON"); + cx = _fill_cstate_usage(dev, 1); cx->mpu_state = PWRDM_POWER_ON; cx->core_state = PWRDM_POWER_ON; /* C3 . MPU CSWR + Core inactive */ - cx = _fill_cstate(dev, 2, "MPU RET + CORE ON"); + _fill_cstate(drv, 2, "MPU RET + CORE ON"); + cx = _fill_cstate_usage(dev, 2); cx->mpu_state = PWRDM_POWER_RET; cx->core_state = PWRDM_POWER_ON; /* C4 . MPU OFF + Core inactive */ - cx = _fill_cstate(dev, 3, "MPU OFF + CORE ON"); + _fill_cstate(drv, 3, "MPU OFF + CORE ON"); + cx = _fill_cstate_usage(dev, 3); cx->mpu_state = PWRDM_POWER_OFF; cx->core_state = PWRDM_POWER_ON; /* C5 . MPU RET + Core RET */ - cx = _fill_cstate(dev, 4, "MPU RET + CORE RET"); + _fill_cstate(drv, 4, "MPU RET + CORE RET"); + cx = _fill_cstate_usage(dev, 4); cx->mpu_state = PWRDM_POWER_RET; cx->core_state = PWRDM_POWER_RET; /* C6 . MPU OFF + Core RET */ - cx = _fill_cstate(dev, 5, "MPU OFF + CORE RET"); + _fill_cstate(drv, 5, "MPU OFF + CORE RET"); + cx = _fill_cstate_usage(dev, 5); cx->mpu_state = PWRDM_POWER_OFF; cx->core_state = PWRDM_POWER_RET; /* C7 . MPU OFF + Core OFF */ - cx = _fill_cstate(dev, 6, "MPU OFF + CORE OFF"); + _fill_cstate(drv, 6, "MPU OFF + CORE OFF"); + cx = _fill_cstate_usage(dev, 6); /* * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot * enable OFF mode in a stable form for previous revisions. @@ -400,6 +422,9 @@ int __init omap3_idle_init(void) cx->mpu_state = PWRDM_POWER_OFF; cx->core_state = PWRDM_POWER_OFF; + drv->state_count = OMAP3_NUM_STATES; + cpuidle_register_driver(&omap3_idle_driver); + dev->state_count = OMAP3_NUM_STATES; if (cpuidle_register_device(dev)) { printk(KERN_ERR "%s: CPUidle register device failed\n", -- cgit v1.2.3-18-g5258 From a1bcc1dcef8451b4291ea2a1b2677cb194102952 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 7 Nov 2011 12:27:10 -0800 Subject: ARM: OMAP: Fix export.h or module.h includes Commit 32aaeffbd4a7457bf2f7448b33b5946ff2a960eb (Merge branch 'modsplit-Oct31_2011'...) caused some build errors. Fix these and make sure we always have export.h or module.h included for MODULE_ and EXPORT_SYMBOL users: $ grep -rl ^MODULE_ arch/arm/*omap*/*.c | xargs \ grep -L linux/module.h arch/arm/mach-omap2/dsp.c arch/arm/mach-omap2/mailbox.c arch/arm/mach-omap2/omap-iommu.c arch/arm/mach-omap2/smartreflex.c Also check we either have export.h or module.h included for the files exporting symbols: $ grep -rl EXPORT_SYMBOL arch/arm/*omap*/*.c | xargs \ grep -L linux/export.h | xargs grep -L linux/module.h Cc: Russell King Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/dsp.c | 1 + arch/arm/mach-omap2/mailbox.c | 1 + arch/arm/mach-omap2/omap-iommu.c | 1 + arch/arm/mach-omap2/smartreflex.c | 1 + 4 files changed, 4 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c index 911cd2e68d4..74f18f2952d 100644 --- a/arch/arm/mach-omap2/dsp.c +++ b/arch/arm/mach-omap2/dsp.c @@ -18,6 +18,7 @@ * of the OMAP PM core code. */ +#include #include #include "cm2xxx_3xxx.h" #include "prm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 86d564a640b..609ea2ded7e 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c @@ -10,6 +10,7 @@ * for more details. */ +#include #include #include #include diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c index e61feadcda4..b8822048e40 100644 --- a/arch/arm/mach-omap2/omap-iommu.c +++ b/arch/arm/mach-omap2/omap-iommu.c @@ -10,6 +10,7 @@ * published by the Free Software Foundation. */ +#include #include #include diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 0347b93211e..6a4f6839a7d 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c @@ -17,6 +17,7 @@ * published by the Free Software Foundation. */ +#include #include #include #include -- cgit v1.2.3-18-g5258